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Friday 27 November 2015

A seventeen-level inverter with a single DC link for motor drives


           
ABSTRACT:  

In the present paper, a novel topology for generating a 17–level inverter using three-level flying capacitor inverter and cascaded H-bridge modules with floating capacitors. The proposed circuit is analyzed and various aspects of it are presented in the paper. This circuit is experimentally verified and the results are shown. The stability of the capacitor balancing algorithm has been verified during sudden acceleration. This circuit has many pole voltage redundancies. This circuit has an advantage of balancing all the capacitor voltages instantaneously by switching through the redundancies. Another advantage of this topology is its ability to generate all the 17 pole voltages from a single DC link which enables back to back converter operation. Also, the proposed inverter can be operated at all load power factors and modulation indices. Another advantage is, if one of the H-bridges fail, the inverter can still be operated at full load with reduced number of levels.

KEYWORDS:

1.      Seventeen level inverter
2.       Multilevel inverter
3.      Flying Capacitor
4.       Cascaded H-bridge

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

       


Fig.1. Proposed seventeen level inverter configuration formed by cascading three level flying capacitor inverter with 3 H-bridges using a Single DC link.

EXPECTED SIMULATION RESULTS:

         

                                                                  (a)

                                                                    (b) 
                        

                                                                    (c)
                  

                                                                    (d)

Fig.2: Voltages of  Capacitors C2, C3, C4 along with the phase current IA
(a)  10Hz operation, VAC4: (100V/div), VAC3: (10V/div), VAC2: (25V/div),IA:5A/div, Timescale: (20 mS/div).
(b)  20Hz operation, VAC4: (20V/div), VAC3: (10V/div), VAC2: (25V/div),IA:2A/div, Timescale: 10mS/div
(c)  30Hz operation, VAC4: (20V/div), VAC3: (10V/div), VAC2: (25V/div),IA:2A/div, Timescale: 10mS/div
(d)  40Hz operation, VAC4: (10V/div), VAC3: (10V/div), VAC2: (100V/div), IA:2A/div,Timescale:5mS/div
                          
                                 
                           
                                                                       (a)
                       

                                                                       (b)
                          

                                                                       (c)
                            

                                                                      (d)
Fig.3: Voltages of  Cap1 with Pole voltage VAO, Phase A Voltage VAN and  phase current IA. 
(a)   10Hz operation, VAC1( 50V/div), VAO: Pole voltage( 100V/div),VAN: Phase Voltage (100V/div),  IA: 2A/div, Timescale: (20mS/div).
(b)  20Hz operation, VAC1: ( 50V/div), VAO: Pole voltage( 100V/div),VAN: Phase Voltage (100V/div),  IA: 2A/div, Timescale: (10mS/div).
(c)    30Hz operation, VAC1: ( 50V/div), VAO: Pole voltage( 100V/div), VAN: Phase Voltage (100V/div),  IA: 2A/div, Timescale: (10mS/div).
(d)    40Hz operation, VAC1: ( 50V/div), VAO: Pole voltage( 100V/div),VAN: Phase Voltage (100V/div),  IA: 2A/div, Timescale: (10mS/div).
                    


                                                                      (a)

                                                                        (b)
Fig.4.  Performance of the capacitor balancing algorithm during sudden acceleration at no load from 10Hz to 40Hz  (a) VAC1:Cap AC1 voltage(100V/div), VAO: Pole Voltage(100V/div) , VAN: Phase Voltage(100V/div), IA: Phase current(2A/div)  (b) VAC4:Cap AC4 voltage(10V/div), VAC3:Cap AC3 voltage (20V/div), VAC2:Cap AC2 voltage (20V/div), IA: Phase current(2A/div)

CONCLUSION:
A  seventeen  level  inverter  formed  by  cascading  a  three level  flying  capacitor  with  floating  capacitor  H-bridges  has been proposed. The proposed inverter has reduced number of  switches as compared with standard configurations.  The  inverter  has  other  advantages  like  ability  to  balance  all  the  capacitor voltages at all  load currents and power  factors  there  by  generating  seventeen  pole  voltages  with  very  little  distortion.   Another advantage of  the  inverter  is ability  to generate all  the  required  voltage  levels  using  a  single  DC  link.  This  possibility  of  using  single  DC  link  enables  back  to  back  converter  operation  where  a  front  end  can  be  used  so  that  power  can  be  drawn  and  supplied  to  grid  at  desired  power  1%#' factor. Another important advantage is if one of devices in one of H-bridges fail, the inverter can still be operated at full load at reduced number of levels.  The proposed  inverter  is  analyzed  and  its  performance  is  experimentally  verified  for  various  modulation  indices  and  load  currents  by  running  a  three  phase  3kW  squirrel  cage  induction  motor.  The  stability  of  the  capacitor  balancing  algorithm  has  been  tested  experimentally  by  suddenly  accelerating  the motor  at no  load  and observing  the  capacitor  voltages at various load currents.

REFERENCES:
 [1] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, M.A.M.  Prats,  “The  age  of multilevel  converters  arrives,”  IEEE  Ind.  Electron.  Magazine, vol. 2, no. 2, pp. 28–39, June.2008.
[2] S.  Kouro,  M.  Malinowski,  K.  Gopakumar,  J.  Pou,  L.  G.  Franquelo,  B.Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, “Recent Advances and  Industrial  Applications  of  Multilevel  Converters,”  IEEE  Trans.  Ind.  Electron.,vol. 57, no. 8, pp. 2553–2580, Aug. 2010.
[3] A. Nabae,  I.  Takahashi,  and H. Akagi,  “A  new  neutral-point-clamped  PWM inverter,” IEEE Trans. Ind. Appl., vol. IA-17, no. 5, pp. 518–523,  Sep. 1981. 
[4] M. Marchesoni, M. Mazzucchelli, and S. Tenconi, “A non-conventional  power  converter  for  plasma  stabilization,”  in  Proc.  IEEE  19th  Annu.  Power  Electron.  Spec. Conf.  (PESC’88) Rec., Apr.  11–14,  vol.  1,  pp.  122–129.

[5] Z.  Du,  L.M.  Tolbert,  J.  N.  Chiasson,  B.  Ozpineci,  H.  Li,  and  A.  Q.  Huang,  “Hybrid  cascaded H-bridges multilevel motor drive  control  for  electric vehicles,” in Proc. IEEE 37th Power Electron. Spec. Conf., Jun.  18–22, 2006, pp. 1–6.