Verification of New Family for Cascade Multilevel Inverters with Reduction of Components

ABSTRACT:

This paper presents a new group for multilevel converter that operates as symmetric and asymmetric state. The proposed multilevel converter generates DC voltage levels similar to other topologies with less number of semiconductor switches. It results in the reduction of the number of switches, losses, installation area, and converter cost. To verify the voltage injection capabilities of the proposed inverter, the proposed topology is used in dynamic voltage restorer (DVR) to restore load voltage. The operation and performance of the proposed multilevel converters are verified by simulation using SIMULINK/MATLAB and experimental results.

KEYWORDS:

1.      Cascaded multilevel converter,

2.      New topology

3.       Reduction of components

4.       DVR

SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:

Fig. 1. Proposed cascade topology

                                                                  Fig. 2. Proposed topology with four DC voltage sources.

 EXPECTED SIMULATION RESULTS:

Fig. 3. (a) Supply voltage, (b) DVR injection voltage, and (c) load voltage for the three-phase balanced voltage sag.

Fig. 4. Output phase voltage in fault (sag) time

Fig. 5. (a) Supply voltage, (b) DVR injection voltage, and (c) load voltage for the three-phase balanced voltage swell.

Fig. 6. Output phase voltage in fault (swell) time.

CONCLUSION:

In this paper, a novel topology was presented for multilevel converter, which has reduced number of switches. The suggested topology needs fewer switches for realizing voltages for the same levels of output voltages. This point reduces the installation area and the number of gate driver circuits. Therefore, the cost of the suggested topology is less than the conventional topology. Based on the presented switching algorithm, the multilevel inverter generates near sinusoidal output voltage, causing very low harmonic distortion. The suggested inverter used in DVR does not require any coupling series transformer and has lower cost, smaller size, and higher performance and efficiency. Simulation results verified the validity of the presented concept.

REFERENCES:

[1] Z. Pan, F.Z. Peng, “Harmonics optimization of the voltage balancing control for multilevel converter/ inverter systems”, IEEE Trans. Power Electronics, pp. 211-218, 2006.

[2] L.M. Tolbert, F. Z. Peng, T. Cunnyngham, J. N. Chiasson, “Charge Balance Control Schemes for Cascade Multilevel Converter in Hybrid Electric Vehicles,” IEEE Trans. Industrial Electronics, Vol. 49, No. 5, pp. 1058-1064, Oct. 2002.

[3] S. Mariethoz, A. Rufer, “New configurations for the three-phase asymmetrical multilevel inverter,” in Proceeding of the IEEE 39th Annual Industry Applications Conference, pp. 828-835, Oct. 2004.

[4] J.Rodriguez, J.S. Lai, F.Z. Peng, “Multilevel Inverter: A Survey of Topologies, Controls, and applications”, IEEE Trans. on Industrial Electronics, Vol. 49, No. 4, August. 2002.

[5] J.S. Lai, F.Z. Peng, “Multilevel Converters-A New Breed of power Converters”, IEEE Trans. Industry Application, Vol. 32, No. 3, pp. 509-517, MAY/JUNE.1996

Hybrid Topology of Asymmetric Cascaded Multilevel Inverter with Renewable Energy Sources

ABSTRACT:

This paper presents a binary topology of Multimodule level inverters produce a staircase output voltage from renewable DC voltage sources. The MLI (Multi Level Inverter) Requires many number of semiconductor switches is main drawback of multilevel inverters. The MLI can be classified as two method, one is symmetric and another asymmetric converters. In symmetrical multilevel inverter can apply same voltage level to all cascaded circuit, in asymmetric multilevel inverters can be vary input source voltage at each cascaded H-bridge by using binary algorithm. In this paper, a discrete binary topology for multilevel converters is proposed using cascaded sub-multilevel Cells. This sub-multilevel converter can produce sixty three levels of voltage from five discrete DC source. The Total Harmonic Distortions (THD) is minimized by discrete binary topology. The working operation and performance of the proposed multilevel inverters studies has been verified by simulation of using SIMULINK / MA TLAB results.

KEYWORDS:

1.      Asymmetric Cascaded Multilevel Inverter

2.       Reduction Of Thyristor Switches

3.      Minimized Total Harmonic Distortions

4.      High Output Gain

5.      Discrete Binary Topology

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig 1 General Block Diagram Of Cascaded MLI

EXPECTED SIMULATION RESULTS:

Fig 2 Harmonic Reduction Of Cascaded Multilevel Inverter

Fig 3 Thyristor Pair ON State Position of Positive and Negative Sine

Switching Techniques

 Fig 4 Switching Techniques, Output Voltage And Gate Triggering System

(G I ,G 2,G3,G4,G5) Wave Form of Cascaded Multilevel Inverter.

Fig 5 Output Voltage and Current Wave Form of Proposed Multilevel

Inverter

                                                                 

CONCLUSION:

In this paper, a discreet binary topology was presented for cascaded multilevel Inverter, which has reduced number of thyristor switches. The suggested discreet binary topology requires limited switches for synthesized output voltages. The hybrid topology of common h-bridge cascaded multilevel inverter is proposed for variable AC output voltages and frequencies as per given source input by using reduced no of switches to half than conventional inverter. Therefore, the cost of proposed system reduced. As a result, the output voltage waveform presents very low total harmonic distortion profile and provides better efficient. The application of this project is ups and variable speed drives which result in high dynamic response for speed.

REFERENCES:

[I] Jaison Mathew, K. Mathew, Najath Abdul Azeez, P. P. Rajeevan, and K. Gopakumar, "A Hybrid Multilevel Inverter System Based on Dodecagonal Space Vectors for Medium Voltage 1M Drives," IEEE Transactions On Power Electronics, Vol. 28, No.8, August 2013.

[ 2] Dong Cao, Shuai Jiang, and Fang Zheng Peng, "Optimal Design of a Multilevel Modular Capacitor-Clamped DC-DC Converter," IEEE Transactions On Power Electronics, Vol. 28, No.8, August 2013.

[3] P.Roshankumar,P.P.Rajeevan,K.Mathew,K. Gopakumar, Jose I. Leon, and Leopoldo G. Franquelo, "A Five-Level Inverter Topology with Single-DC Supply by Cascading a Flying Capacitor Inverter and an H-Bridge," IEEE Transactions On Power Electronics, Vol. 27, No.8, August 2012.

[4] Qin Lei, Fang Zheng Peng, and Shuitao Yang, "Multiloop Control Method for High-Performance Microgrid Inverter Through Load Voltage and Current Decoupling With Only Output Voltage Feedback," IEEE Transactions On Power Electronics, Vol. 26, No.3, March 20 II.

[5]M. R. Banaei and E. Salary, "Verification of New Family for Cascade Multilevel Inverters with Reduction of Components," Journal of Electrical Engineering & Technology Vol. 6, No. 2, pp. 245-254, 2011 D01 :IO.5370/JEET.2011.6.2.245.

A New Hybrid Power Conditioner for Suppressing Harmonics and Neutral-Line Current in Three-Phase Four-Wire Distribution Power Systems

 ABSTRACT:

In this paper, a new hybrid power conditioner is proposed for suppressing harmonic currents and neutral-line current in three-phase four-wire distribution power systems. The proposed hybrid power conditioner is composed of a neutral-line current attenuator and a hybrid power filter. The hybrid power filter, configured by a three-phase power converter and a three-phase tuned power filter, is utilized to filter the nonzero-sequence harmonic currents in the three-phase four-wire distribution power system. The three-phase power converter is connected to the inductors of the three-phase tuned power filter in parallel, and its power rating can thus be reduced effectively. The tuned frequency of the three-phase tuned power filter is set at the fifth harmonic frequency. The neutral- line current suppressor is connected between the power capacitors of the three-phase tuned power filter and the neutral line to suppress the neutral-line current in the three-phase four-wire distribution power system. With the major fundamental voltage of the utility dropping across the power capacitors of the three-phase tuned power filter, the power rating of the neutral-line current suppressor can thus be reduced. Hence, the proposed hybrid power conditioner can effectively reduce the power rating of passive and active elements. A hardware prototype is developed to verify the performance of the proposed hybrid power conditioner. Experimental results show that the proposed hybrid power conditioner achieves expected performance.

KEYWORDS:

1.      Harmonic

2.      Neutral-line current

3.      Power converter

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig. 1. Configuration of the advanced hybrid power filter.

Fig. 2. System configuration of the proposed hybrid power conditioner.

EXPECTED SIMULATION RESULTS:

Fig. 3. Experimental results of the balanced three-phase load: (a) phase a load

current, (b) phase b load current, (c) phase c load current, and (d) neutral line current of load.

 Fig. 4. Experimental results of the hybrid power conditioner under the balanced three-phase load: (a) phase a utility current, (b) phase b utility current, (c) phase c utility current, and (d) neutral line current of the utility.

Fig. 5. Experimental results of the three-phase four-wire hybrid power conditioner under the transient of applying the neutral-line current attenuator: (a) phase a utility voltage, (b) phase a utility current, (c) phase a load current, and (d) neutral line current of the utility.

Fig. 6. Experimental results of the unbalanced three-phase load, (a) phase a load current, (b) phase b load current, (c) phase c load current, and (d) neutral line current of the load.

Fig. 7. Experimental results of the hybrid power conditioner under the unbalanced three-phase load: (a) phase a utility current, (b) phase b utility current, (c) phase c utility current, and (d) neutral line current of the utility.

Fig. 8. Experimental results of the hybrid power conditioner under the transient of increasing load: (a) phase a utility voltage, (b) phase a utility current, (c) phase a load current, and (d) neutral line current of the utility.

 CONCLUSION:  

Three-phase four-wire distribution power systems have been widely applied to low-voltage applications; however, they encounter serious problems of harmonic current pollution and large neutral-line current. In this paper, a new hybrid power conditioner, composed of a hybrid power filter and a neutral- line current attenuator, is proposed. In the proposed hybrid power conditioner, the power capacity of power converters in the hybrid power filter and neutral-line current attenuator can be effectively reduced, thus increasing its use in high-power applications and enhancing the operation efficiency. A prototype is developed and tested. Experimental results verify that the proposed hybrid power conditioner can suppress the harmonic currents and attenuate the neutral-line current effectively whether the loads are balanced or not. Hence, the proposed hybrid power conditioner is an effective solution to the problems of harmonic currents and neutral-line current in three-phase four-wire distribution power systems. Besides, the output current of the three-phase power converter is much smaller than the conventional hybrid power filter, and the power rating of the zig-zag transformer is smaller than the rating of the conventional neutral-line current attenuator.

REFERENCES:

[1] B. Singh, P. Jayaprakash, T. R. Somayajulu, and D. P. Kothari, “Reduced rating VSC with a zig-zag transformer for current compensation in a three-phase four-wire distribution system,” IEEE Trans. Power Del., vol. 24, no. 1, pp. 249–259, Jan. 2009.

[2] R. M. Ciric, L. F. Ochoa, A. Padilla-Feltrin, and H. Nouri, “Fault analysis in four-wire distribution networks,” Proc. Inst. Elect. Eng., Gen., Transm. Distrib., vol. 152, no. 6, pp. 977–982, 2005.

[3] J. C. Meza and A. H. Samra, “Zero-sequence harmonics current minimization using zero-blocking reactor and zig-zag transformer,” in Proc. IEEE DRPT, 2008, pp. 1758–1764.

[4] H. L. Jou, J. C.Wu,K.D.Wu,W. J. Chiang, andY. H. Chen, “Analysis of zig-zag transformer applying in the three-phase four-wire distribution power system,” IEEE Trans. Power Del., vol. 20, no. 2, pt. 1, pp. 1168–1178, Apr. 2005.

[5] S. Choi and M. Jang, “Analysis and control of a single-phase-inverterzigzag- transformer hybrid neutral-current suppressor in three-phase four-wire systems,” IEEE Trans. Ind. Electron., vol. 54, no. 4, pp. 2201–2208, Aug. 2007.

A New Interleaved Three-Phase Single-Stage PFC AC-DC Converter with Flying Capacitor

ABSTRACT:

A new interleaved three-phase PFC AC-DC single-stage multilevel is proposed in this paper. The proposed converter can operate with reduced input current ripple and peak switch currents due to its interleaved structure, a continuous output inductor current due to its three-level structure, and improved light-load efficiency as some of its switches can be turned on softly. In the paper, the operation of the converter is explained, the steady-state characteristics of the new converter are determined and its design is discussed. The feasibility of the new converter is confirmed with experimental results obtained from a prototype converter and its efficiency is compared to that of another multilevel converter of similar type.

KEYWORDS:

1.      AC-DC power factor correction

2.      Single-stage converters

3.      Three-Phase Systems

4.      Three level converters

5.      Phase shifted modulation.

SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

Fig. 1. An interleaved three-phase three-level converter.

Fig. 2. Proposed single-stage three-level ac-dc converter.

 EXPECTED SIMULATION RESULTS:

(a) Input current and voltage (V: 100 V/div, I: 4 A/div)

(b) Primary voltage of the main transformer (V:100V/div.,t: 4 µs/div.)

(c) V_ds and I_d current of S₄ (V: 100V/div., I:5A/div, t:10 µs/div.s)

Fig. 3. Typical converter waveforms.

Fig. 4. Efficiency of PWM and PSM three-level single-stage ac-dc converters

CONCLUSION:

A new interleaved three-phase, three-level, single-stage power-factor-corrected AC-DC converter using standard phase-shift PWM was presented in this paper. In this paper, the operation of the converter was explained and its feasibility was confirmed with experimental results obtained from a prototype converter. The efficiency of the new converter was compared to that of another converter of the same type. It was shown that the proposed converter has a better efficiency, especially under light-load conditions, and it was explained that this is because energy from the output inductor can always be used to ensure that the very top and the very bottom switches can be turned ON with ZVS, due to a discharge path that is introduced by its flying capacitor.

REFERENCES:

 [1] “Limits for Harmonic Current Emission (Equipment Input Current>16A per Phase),” IEC1000-3-2 International Standard, 1995.

[2] J.M. Kwon, W.Y. Choi, B.H. Kwon, “Single-stage quasi-resonant flyback converter for a cost-effective PDP sustain power module,” IEEE Trans. on Industrial. Elec., vol. 58, no. 6, pp 2372-2377, 2011.

[3] H.S. Ribeiro and B.V. Borges, “New optimized full-bridge single-stage ac/dc converters,” IEEE Trans. on Industrial. Elec., vol. 58, no. 6, pp. 2397-2409, 2011.

[4] N. Golbon, and G. Moschopoulos, “A low-power ac-dc single-stage converter with reduced dc bus voltage variation”, IEEE Trans. on Power Electron., vol. 27, no.8, pp. 3714–3724, Jan. 2012.

[5] H. M. Suraywanshi, M.R. Ramteke. K. L. Thakre, and V. B. Borghate, “Unity-power-factor operation of three phase ac-dc soft switched converter based on boost active clamp topology in modular approach,” IEEE Trans. on Power Elec., vol. 23, no. 1., pp. 229-236, Jan. 2008.