Seven-Level Packed U-Cell (PUC) Converter with Natural Balancing of Capacitor Voltages

 ABSTRACT:

A seven-level Packed U-Cell inverter is presented in this paper. The converter uses a single dc source and two floating capacitors, whose voltages are balanced in open loop, to produce multilevel output voltage. Peak magnitude of the output phase voltage is equal to the magnitude of dc source. Voltages across floating capacitors add intermediate voltage-levels by establishing an asymmetric ratio (with respect to the available dc voltage in the circuit). The average energy exchange (when the network is in steady state) of the capacitors with the rest of the inverter-circuit will be zero. This helps the capacitors to maintain desired voltages and thus create intermediate levels of steady dc voltages. Performance of the converter is validated in simulation by MATLAB/Simulink and testing of the converter is done for resistive as well as inductive loads. Experimental verification of the converter is carried out on a laboratory prototype and the obtained results match well with the simulation.

KEYWORDS:

1.      PUC converter

2.      Natural balancing

3.      Open-loop control

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 

A seven-level Packed U-Cell converter is presented. The converter contains only one dc source and two floating capacitors. Voltages of floating capacitors along with the available dc voltage source establish a ratio of 3:2:1. Floating capacitors work by the principle of current-sec balance and therefore have natural balancing capability. Concept of natural balancing works regardless of the modulation index and load power factor. Time-domain expressions for the capacitor voltages are derived considering a specific switching operation of the converter. This helped in analytically validating the concept of natural balancing. Capacitor requirement in terms of kJ/MVA is discussed which forms an important aspect of the converter. Losses and efficiency of the converter are presented in comparison with few basic topologies including a standard two-level inverter. Performance of the inverter is validated through extensive simulations in MATLAB/Simulink. Experimental verification is done by developing a laboratory prototype to confirm the usefulness of the proposed concept.

REFERENCES:

[1] K. Boora and J. Kumar, “A Novel Cascaded Asymmetrical Multilevel Inverter With Reduced Number of Switches,” in IEEE Transactions on Industry Applications, vol. 55, no. 6, pp. 7389-7399, Nov.-Dec. 2019.

[2] C. W. Flairty, “A 50-kva adjustable-frequency 24-phase controlled rectifier inverter,” IRE Transactions on Industrial Electronics, vol. IE-9, no. 1, pp. 56–60, May 1962.

[3] K. K. Gupta, A. Ranjan, P. Bhatnagar, L. K. Sahu, and S. Jain, “Multilevel inverter topologies with reduced device count: A review,” IEEE Transactions on Power Electronics, vol. 31, no. 1, pp. 135–151, Jan 2016

[4] F. Sebaaly, H. Vahedi, H. Y. Kanaan and K. Al-Haddad, “Experimental Design of Fixed Switching Frequency Model Predictive Control for Sensorless Five-Level Packed U-Cell Inverter,” in IEEE Transactions on Industrial Electronics, vol. 66, no. 5, pp. 3427-3434, May 2019.

[5] A. Routray, R. Singh and R. Mahanty, “Harmonic Reduction in Hybrid Cascaded Multilevel Inverter Using Modified Grey Wolf Optimization,” in IEEE Transactions on Industry Applications.

Robust ANN-Based Control of Modified PUC-5 Inverter for Solar PV Applications

 ABSTRACT:

Conventional PI controllers are vulnerable to changes in parameters and are difficult to tune. In this work, an artificial neural network (ANN) based controller is developed for the robust operation of a single-phase modified packed U-cell five-level inverter (MPUC-5) for solar PV application under variable insolation conditions. An MPUC-5 is a converter with a main and an auxiliary dc link of equal magnitude; although five-level operation is also still feasible with different voltages also. The maximum power point (MPP) of a PV array changes with the variation in the solar insolation. This results in a variable voltage at the output of the boost converter while maintaining the load line at the MPP. Consequently, the fundamental value of the output of the MPUC-5 also tends to change. Thus, it is required to produce angles that commit to an ac output voltage with a constant fundamental value and constrained to a minimum total harmonic distortion along with a third-order harmonic mitigation as per the grid codes, irrespective of the change in the dc-link voltages. A genetic algorithm is employed for this purpose. A large dataset is prepared for two-angle and four-angle operation of MPUC-5 under various dc-link voltages and constraints with which an ANN-based controller is trained. A neural network with a hidden layer is trained with the back propagation technique; and once a correlation is developed, the network can be operated for a wide range of operating conditions. The robustness of the controller is verified through simulation in MATLAB/Simulink environment and validated by experimental emulation in an hardware in loop environment.

KEYWORDS:

1.      Artificial neural network (ANN)

2.      Genetic algorithm (GA)

3.      Modified packed U-cell (MPUC) Inverter

4.      multilevel inverter (MLI)

5.      selective harmonic elimination (SHE)

6.      total harmonic distortion (THD)

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 In this work, a five-level modified PUC inverter with a dc link ratio of 1:1 is considered whose switching is controlled by an ANN-based controller. Furthermore, the controller is implemented in a solar PV system where it provides a robust performance by keeping the fundamental value of the voltage across the load constant despite a change in the voltages of the dc links of the converter. GA is employed to furnish the angles that provided such result under constraints of low values of the THD and mitigation of the low-order harmonics, especially the third-order harmonics. A total of 10 201 combinations of such angles were found for two-angle and four-angle operation of the converter separately and were graphically presented. An ANN controller which was based on MLP was then trained on these angles based on the back propagation technique. The robustness of the controller was then verified in Simulink with variations in dc-link voltages. Then, it was also verified for Solar PV application. The output of the converter was of constant fundamental with the THDs and third-order harmonics within the prescribed limits of IEEE. The real-time hardware emulation for the MPUC-5 with the ANN-based controller was successfully performed on Typhoon HIL-402.

 

REFERENCES:

[1] B. Wu and M. Narimani, “High-power converters and AC drives,” in High-Power Converters and AC Drives. Hoboken, NJ, USA:Wiley, 2017, pp. 119–140.

[2] A. Nabae, I. Takahashi, and H. Akagi, “A new neutral-point-clamped PWM inverter,” IEEE Trans. Ind. Appl., vol. IA- 17, no. 5, pp. 518–523, Sep. 1981. [Online]. Available: http://ieeexplore.ieee.org/xpls/abs_all. jsp?arnumber=645616

[3] T. Meynard and H. Foch, “Multi-level conversion: High voltage choppers and voltage-source inverters,” in Proc. Conf. Rec. 23rd Annu. Power Electronics Specialists, Toledo, Spain, 1992, pp. 397–403.

[4] F. Z. Peng, J.-S. Lai, J.W. McKeever, and J. VanCoevering, “A multilevel voltage-source inverter with separate DC sources for staticVar generation,” IEEE Trans. Ind. Appl., vol. 32, no. 5, pp. 1130–1138, Sep./Oct. 1996.

[5] J.-S. Lai and F. Z. Peng, “Multilevel converters—A new breedof power converters,” IEEE Trans. Ind. Appl., vol. 32, no. 3, pp. 2348–2356, May/Jun. 1996.

Modified Seven-Level Pack U-Cell Inverter for Photovoltaic Applications

 ABSTRACT:

This paper proposes a modified configuration of single-phase Pack U-Cell (PUC) multilevel inverter in which the output voltage has higher amplitude than the maximum DC link value used in the topology as a boost operation. The introduced inverter generates seven-level AC voltage at the output using two DC links and six semiconductor switches. Comparing to cascaded H-bridge and neutral point clamp multilevel inverters, the introduced multilevel inverter produces more voltage levels using less components. The proposed inverter is used in PV system where the green power comes from two separate PV panels connected to the DC links through DC-DC converters to draw the maximum power. Due to boost operation of this inverter, two different PV panels can combine and send their powers to the grid. Simulations and experimental tests are conducted to investigate the good dynamic performance of the inverter in grid-connected PV system.

KEYWORDS:

1.      PV Inverter

2.      Pack U-Cell

3.      Modified Pack U-Cell

4.      PUC5

5.      MPUC5

6.      Power Quality

7.      Renewable Energy Conversion

 SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

  In this paper a modified multilevel inverter topology has been presented. The proposed MPUC inverter can generate 7-level voltage waveform at the output with low harmonic contents. Unlike the reported PUC topology, the 7-level MPUC inverter is capable to produce voltage levels more than the DC sources used in the structure. It can sum up the DC buses amplitudes to deliver more power to the output. The associated switching algorithm has been designed and implemented on the introduced MPUC topology with reduced switching frequency aspect. Moreover, photovoltaic application has been targeted for this inverter to deliver power from PV panels with different voltage/current rating to grid. In this regard, results have been shown to validate the acceptable voltage regulation and current controlling of the grid-connected inverter as well as the implemented P&O MPPT algorithm.

REFERENCES:

 [1] B. Singh, A. Chandra, and K. Al-Haddad, Power Quality: Problems and Mitigation Techniques: John Wiley & Sons, 2014.

[2] I. Gowaid, G. Adam, A. Massoud, S. Ahmed, and B. Williams, "Hybrid and Modular Multilevel Converter Designs for Isolated HVDC-DC Converters," IEEE Journal Emerg. and Select. Topics in Power Electron., vol. PP, no. 99, p. 1, 2017.

[3] H. Vahedi, K. Al-Haddad, Y. Ounejjar, and K. Addoweesh, "Crossover Switches Cell (CSC): A New Multilevel Inverter Topology with Maximum Voltage Levels and Minimum DC Sources," in IECON 2013-39th Annual Conference on IEEE Industrial Electronics Society, Austria, 2013, pp. 54-59.

[4] P. W. Hammond, "A new approach to enhance power quality for medium voltage drives," in Petroleum and Chemical Industry Conference, 1995. Record of Conference Papers., Industry Applications Society 42nd Annual, 1995, pp. 231-235.

[5] A. Nabae, I. Takahashi, and H. Akagi, "A new neutral-point-clamped PWM inverter," IEEE Trans. Ind. Applications, no. 5, pp. 518-523, 1981.

Novel Cascaded Switched-Diode Multilevel Inverter for Renewable Energy Integration

 ABSTRACT:

In this paper, a new topology of two-stage cascaded switched-diode (CSD) multilevel inverter is proposed for medium voltage renewable energy integration. First, it aims to reduce the number of switches along with its gate drivers. Thus, the installation space and cost of a multilevel inverter are reduced. The spike removal switch added in the first stage of the inverter provides a flowing path for the reverse load current, and as a result, high voltage spikes occurring at the base of the stepped output voltage based upon conventional CSD multilevel inverter topologies are removed. Moreover, to resolve the problems related to dc source fluctuations of multilevel inverter used for renewable energy integration, the clock phase-shifting (CPS) one-cycle control (OCC) is developed to control the two-stage CSD multilevel inverter. By shifting the clock pulse phase of every cascaded unit, the staircase-like output voltage waveforms are obtained and a strong suppression ability against fluctuations in dc sources is achieved. Simulation and experimental results are discussed to verify the feasibility and performances of the two-stage CSD multilevel inverter controlled by the CPS OCC method.

KEYWORDS:

1.      Novel cascaded multilevel inverter

2.      Two-stage

3.      One-cycle control

 SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 A new topology of two-stage CSD multilevel inverter has been proposed in this paper. n cascaded basic units and one spike removal switch form the first stage. Then by adding a full-bridge inverter as the second-stage converter, both of the positive and negative output voltage levels are generated. Since the one full-bridge converter in the output side leads to the restriction on high-voltage applications, the proposed topology is suitable for medium-voltage renewable energy integration. The comparisons with the CHB and cascaded half-bridge topologies show that the CSD topology requires less switches and related gate drivers for realizing Nlevel output voltage. As a result, the installation space and cost of the multilevel inverter are reduced. Meanwhile, the spike removal switch added in the first stage provides a flowing path for the reverse load current under R-L loads, thus, the high voltage spikes, due to the collapsing magnetic field in a very short time interval, are removed. The CPS OCC method, which is composed by n similar but dependent OCC controllers, has been designed and implemented to control the CSD multilevel inverter. Simulation and experimental results demonstrate that, by shifting the clock pulse phase of each cascaded unit, the staircase-like voltage waveforms are obtained. Moreover, to evaluate the performance of CPS OCC, in both the simulation and experiment, the DC sources mixed with low frequency ripples are implemented to simulate the DC supply from renewable energy generations, and the comparative results between CPS OCC and CPS SPWM reveal that CPS OCC possesses a superior ability in suppressing the unbalance or low frequency ripples in DC sources. These results demonstrate that the CPS OCC method can be a substitute for conventional controllers to control multilevel inverters for renewable energy integration with improved control performances.

REFERENCES:

[1] M. S. B. Ranjiana, P. S. Wankhade, and N. D. Gondhalekar, “A modified cascaded H-bridge multilevel inverter for solar applications,” in Proc. 2014 Int. Conf. Green Comput. Commun. Elect. Eng., 2014, pp. 1–7.

[2] F. S. Kang, S. J. Park, S. E. Cho, C. U. Kim, and T. Ise, “Mutilevel PWM inverters suitable for the use of stand-alone photovoltaic power systems,” IEEE Trans. Energy Convers., vol. 20, no. 4, pp. 906–915, Dec. 2005.

[3] L. V. Nguyen, H.-D. Tran, and T. T. Johnson, “Virtual prototyping for distributed control of a fault-tolerant modular multilevel inverter for photovoltaics,” IEEE Trans. Energy Convers., vol. 29, no. 4, pp. 841–850, Dec. 2014.

[4] J. Rodriguez, J. S. Lai, and F. Z. Peng, “Mutilevel inverters: A survey of topologies, controls, and application,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724–738, Aug. 2002.

[5] F. Z. Peng and J. S. Lai, “Mutilevel converters—A new breed of power converters,” IEEE Trans. Ind. Appl., vol. 32, no. 3, pp. 509–517, May/Jun. 1996.

Comparative Analysis between Five Level Conventional and Modified Cascaded H-Bridge Five Level Inverter Using Multicarrier Pulse width Modulation Techniques

 ABSTRACT:

Multilevel Inverters are getting popular and have become more attractive to researchers in the recent times for high power applications due to their better power quality and higher efficiency as compared to two level inverters. This research work presents a detailed comparative analysis of various multicarrier sinusoidal PWM schemes such as In Phase Disposition, Phase Opposition Disposition and Alternate Phase Opposite Disposition implemented on five level conventional and modified cascaded h-bridge inverters in MATLAB/SIMULINK software. Conventional five level topology uses eight switches and suffers from increased switching complexity while modified five level topology uses only five switches and is recommended to reduce switching complexity and switching losses. It also ensures less number of components, reduced size and overall cost of the system. The effect of modulation index (Ma) on the output harmonic contents in various PWM techniques is also analyzed.

KEYWORDS:

1.      Pulse Width Modulation

2.      Total Harmonic Distortion

3.      Cascaded H-Bridge Multilevel Inverter

4.      Modified Multilevel Inverter

5.      Level Shifted Modulation

6.      Phase Shifted Modulation         

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 It is observed that POD PWM technique has slightly less %THD than IPD and APOD in conventional as well modified MLI. Also, it is concluded that increasing Modulation Index (Ma) reduces %THD. Conventional and Modified MLI has almost same total harmonic distortions but Modified MLI uses only 5 switches whereas Conventional MLI uses 8 switches, hence switching complexity, switching losses and cost of the system is reduced and Modified MLI is recommended to be better choice.

REFERENCES:

[1] B.L Nayak, G. Venkataratnam “ THD and Switching losses Analysis of Multi-Level Inverter Fed 3- Φ Induction Motor Drive”, International Journal of Scientific and Engineering Research, Vol. 5, issue 1,pp 2067-2074”

 [2] E. Beser, B. Arifoglu, S. Camur and E.K Beser “Design and Application of a Single Phase Multilevel Inverter Suitable for using as Voltage Harmonic Source”, Journal of Power Electronics, Vol. 10, No. 2, March 2010.

[3] Y.M Park, H.S Ryu, H.Y Lee, M.G Jung and S.H Lee “Design of Cascaded H-Bridge Multilevel Inverter based on Power Electronics building blocks and control for High Performance”, Journal of Power Electronics, Vol. 10, No. 3, May 2010.

 [4] S. Kouro, K. Gopakumar, J. Pou “Recent Advances and Industrial Applications of Multilevel Converters”, IEEE transaction on Industrial Electronics, Vol. 57, No. 8, August 2010.

[5] P.V Kumar, C.S Kumar and K.R Reddy “ Single Phase Cascaded Multilevel Inverter using Multicarrier PWM Technique”, ARPN Journal of Engineering and Applied Sciences, Vol. 8, No. 10, October 2013.

A Nine-Level T-Type Packed U-Cell Inverter

 ABSTRACT:

This letter proposes a novel nine-level T-type packed U-cell (9L-TPUC) inverter, which consists of one T-type neutral point clamped leg, one half-bridge, two switches and two identical dc sources. And the single carrier modulation scheme can easily produce the corresponding switching sequences, which makes the T-type leg switching under high frequency and other switches operating under low frequency. To further improve the operational efficiency, the T-type leg can be constructed by using SiC devices for withstanding the necessary high frequency switching. The experimental results verified the performance of the proposed topology.1

KEYWORDS:

1.      Packed U-Cell Inverter

2.      Nine-level converter

3.      Single carrier modulation

4.      SiC switch

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 This letter proposes a compact nine-level T-type packed U-cell inverter. Compared with other nine-level inverters, the proposed topology has fewer power semiconductor devices and only needs two isolated dc sources. Furthermore, the proposed PWM scheme only uses one carrier, which can reduce the design and control complexity. Since the T-type leg will generate the high frequency switching waveform, it can be replaced by SiC MOSFETs for significantly reducing switching losses. Experimental results verified the performance of the proposed multilevel topology.

REFERENCES:

 

[1] K. K. Gupta, A. Ranjan, P. Bhatnagar, L. Kumar Sahu, and S. Jain, “Multilevel inverter topologies with reduced device count: A review,” IEEE Trans. Power Electron., vol. 31, no. 1, pp. 135–151, Jan. 2016.

 

[2] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, “Multilevel voltage-source-inverter topologies for industrial medium-voltage drives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930–2945, Dec. 2007.

[3] H. Abu-Rub, J. Holtz, J. Rodriguez, and G. Baoming, “Medium-voltage multilevel inverters: State of the art, challenges, and requirements in industrial applications,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2581–2596, Aug. 2010.

[4] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553–2580, Aug. 2010.

[5] P. R. Bana, K. P. Panda, R. T. Naayagi, P. Siano, and G. Panda, “Recently Developed Reduced Switch Multilevel Inverter for Renewable Energy Integration and Drives Application: Topologies, Comprehensive Analysis and Comparative Evaluation,” IEEE Access, vol. 7, pp. 54888–54909, 2019.

Average Model-Based Feed forward and Feedback Control for PUC5 Inverter

 ABSTRACT:

This paper proposes new average model based control strategies for a 5-level Packed U-cell (PUC5) inverter in both standalone and grid-connected modes of operation. First, a simple feed forward controller (FFC) is designed, using only two pulse width modulation (PWM) carrier signals, for the PUC5 inverter operating in standalone mode. This proposed control technique ensures self-balanced operation with high steady-state performance. Moreover, the employment of the proposed FFC leads to a decrease in the capacitor's value as well as the minimization of the Total Harmonic Distortion (THD). Then, a feedback linearizing control technique is designed to improve the transient and steady-state performances. In grid-connected mode, a reduced-sensor technique based on the FFC and the state feedback (FC) techniques was applied. Simulations and experimental results are presented to prove the high performance of the proposed solutions for standalone and grid-connected operating modes.

KEYWORDS:

1.      Packed U-cell inverter

2.      PUC5

3.      Self-balancing

4.      Average model

5.      Feedback linearizing

6.      Feedforward control

7.      Power quality

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 This work presented novel control strategies for the PUC5 inverter operating in both standalone and grid-connected modes. At a first stage, feed-forward control (FFC) was used to provide self-balancing operation of the PUC5 inverter by an appropriate selection of phase-shift between two carrier signals. The obtained current and voltage waveforms are characterized by a high-quality steady-state and slow dynamic tracking. Therefore, a nonlinear feedback control (FC) was designed to improve the transient and steady-state performances. Simulations and experimental results were provided to validate the proposed techniques. The presented results clearly show the effectiveness of both methods in maintaining a balanced capacitor voltage with high performance in tracking the reference current.

REFERENCES:

[1] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B.Wu, J. Rodriguez, M. A. Pérez, and J. I. Leon, ``Recent advances and industrial applications of multilevel converters,'' IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553_2580, Aug. 2010.

[2] L. Franquelo, J. Rodriguez, J. Leon, S. Kouro, R. Portillo, and M. Prats, ``The age of multilevel converters arrives,'' IEEE Ind. Electron. Mag., vol. 2, no. 2, pp. 28_39, Jun. 2008.

[3] J. Rodriguez, J.-S. Lai, and F. Zheng Peng, ``Multilevel inverters: A survey of topologies, controls, and applications,'' IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724_738, Aug. 2002.

[4] S. Khomfoi and L. M. Tolbert, ``Multilevel power converters,'' in Power Electronics Handbook. Amsterdam, The Netherlands: Elsevier, 2011, pp. 455_486.

[5] K. Al-Haddad, Y. Ounejjar, and L.-A. Gregoire, ``Multilevel electric power converter,'' U.S. Patent 9 331 599, May 3, 2016.

Standalone Operation of Modified Seven-Level Packed U-Cell (MPUC) Single-Phase Inverter

 ABSTRACT:

In this paper the standalone operation of the modified seven-level Packed U-Cell (MPUC)  inverter is presented and analyzed. The MPUC inverter has two DC sources and six switches, which generate seven voltage levels at the output. Compared to cascaded H-bridge and neutral point clamp multilevel inverters, the MPUC inverter generates a higher number of voltage levels using fewer components. The experimental results of the MPUC prototype validate the appropriate operation of the multilevel inverter dealing with various load types including motor, linear, and nonlinear ones. The design considerations, including output AC voltage RMS value, switching frequency, and switch voltage rating, as well as the harmonic analysis of the output voltage waveform, are taken into account to prove the advantages of the introduced multilevel inverter.

KEYWORDS:

1.      Multilevel inverter

2.      Packed u-cell

3.      Power quality

4.      Multicarrier PWM

5.       Renewable energy conversion

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 In this paper a reconfigured PUC inverter topology has been presented and studied experimentally. The proposed MPUC inverter can generate a seven-level voltage waveform at the output with low harmonic contents. The associated switching algorithm has been designed and implemented on the introduced MPUC topology with reduced switching frequency aspect. Switches’ frequencies and ratings have been investigated experimentally to validate the good dynamic performance of the proposed topology. Moreover, the comparison of MPUC to the CHB multilevel inverter showed other advantages of the proposed multilevel inverter topology, including fewer components, a lower manufacturing price, and a smaller package due to reduced filter size.

REFERENCES:

1. Bose, B.K. Multi-Level Converters; Multidisciplinary Digital Publishing Institute: Basel, Switzerland, 2015.

2. Mobarrez, M.; Bhattacharya, S.; Fregosi, D. Implementation of distributed power balancing strategy with a layer of supervision in a low-voltage DC microgrid. In Proceedings of the 2017 IEEE Applied Power Electronics Conference and Exposition (APEC), Tampa, FL, USA, 26–30 March 2017; pp. 1248–1254.

3. Franquelo, L.G.; Rodriguez, J.; Leon, J.I.; Kouro, S.; Portillo, R.; Prats, M.A.M. The age of multilevel converters arrives. IEEE Ind. Electron. Mag. 2008, 2, 28–39. [CrossRef]

4. Malinowski, M.; Gopakumar, K.; Rodriguez, J.; Perez, M.A. A survey on cascaded multilevel inverters. IEEE Trans. Ind. Electron. 2010, 57, 2197–2206. [CrossRef]

5. Nabae, A.; Takahashi, I.; Akagi, H. A new neutral-point-clamped PWM inverter. IEEE Trans. Ind. Appl. 1981, 5, 518–523. [CrossRef]

Reduced DC Link Voltage Active Power Filter Using Modified PUC5 Converter

 ABSTRACT:

In this paper the 5-level Packed U-Cell (PUC5) inverter is reconfigured with two identical DC links operating as an active power filter (APF). Generally, the peak voltage of an APF should be greater than the AC voltage at the point of common coupling (PCC) to ensure boost operation of the converter in order to inject harmonic current into the system effectively; therefore, full compensation can be obtained. The proposed modified PUC5 (MPUC5) converter has two equally regulated separated DC links, which can operate at no load condition useful for APF application. Those divided DC terminals amplitudes are added at the input of the MPUC5 converter to generate a boosted voltage that is higher than the PCC voltage. Consequently, the reduced DC links voltages are achieved since they do not individually need to be higher than the PCC voltage due to the mentioned fact that their summation has to be higher than PCC voltage. The voltage balancing unit is integrated into modulation technique to be decoupled from the APF controller. The proposed APF is practically tested to validate its good dynamic performance in harmonic elimination, AC side power factor correction, reactive power compensation and power quality improvement.

KEYWORDS:

1.      Active Power Filter

2.      PUC5

3.      Harmonic Elimination

4.      Power Factor Correction

5.      Power Quality

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 The MPUC5 configuration has been introduced as a modification to the PUC5 topology with the advantage of DC voltage boosting. It has been employed as an APF with reduced DC link voltages. The voltage balancing between DC capacitors in the APF has been done by the redundant switching states. Since the two capacitors voltages are regulated without external controllers, a simple cascaded control technique has been implemented to keep the sum of two DC voltages values at the reference level as well as synchronizing the source current with grid voltage. Finally, the performance of the MPUC5 APF has been tested practically. Results have shown that the proposed configuration operated well in current harmonic elimination, reactive power compensation and power factor correction.

REFERENCES:

[1] B. Singh, A. Chandra, and K. Al-Haddad, Power Quality: Problems and Mitigation Techniques: John Wiley & Sons, 2014.

[2] S. Rahmani, K. Al-Haddad, H. Y. Kanaan, and B. Singh, "Implementation and simulation of modified PWM with two current control techniques applied to single-phase shunt hybrid power filter," IEE Proc. Electric Power Applications, vol. 153, no. 3, pp. 317-326, 2006.      

[3] H. Zhang, S. J. Finney, A. Massoud, and B. W. Williams, "An SVM algorithm to balance the capacitor voltages of the three-level NPC active power filter," IEEE Trans. Power Electron., vol. 23, no. 6, pp. 2694-2702, 2008.

[4] S. Du, J. Liu, and J. Lin, "Hybrid cascaded H-bridge converter for harmonic current compensation," IEEE Trans. Power Electron., vol. 28, no. 5, pp. 2170-2179, 2013.

[5] M. Sharifzadeh, H. Vahedi, R. Portillo, M. Khenar, A. Sheikholeslami, L. G. Franquelo, et al., "Hybrid SHM-SHE Pulse Amplitude Modulation for High Power Four-Leg Inverter," IEEE Trans. Ind. Electron., vol. 63, no. 11, pp. 7234-7242, 2016.