ABSTRACT:
Induction
motor (IM) is the workhorse of the industries. Amongst various speed control
schemes for IM, variable-voltage variable-frequency (VVVF) is popularly used. Inverters
are broadly used to produce variable/controlled frequency and
variable/controlled output voltage for various applications like ac machine drives,
switched mode power supply (SMPS), uninterruptible power supplies (UPS), etc.
This paper presents the two-fold solution of control for such loads. In this novel
solution, rms values of output voltage is varied by controlling the inverter
duty ratio which operates as an ac chopper, while the fundamental frequency of
output voltage is varied by controlling the buck-boost converter according to
the reference frequency given to it. The buck-boost converter shuffles between
buck-mode and boost-mode to produce required frequency by generating the modulated
dc-link for the inverter, unlike conventional fixed dc-link in case of ac-dc-ac
converters. The proposed technique eliminates over modulation (as in conventional
pulse width modulated inverters) and hence the non-linearity, and lower order
harmonics are absent. Further, it reduces dv/dt in the output voltage
resulting less stress on the insulation of machine winding, and electromagnetic
interference. However, the proposed scheme demands more number of power semiconductor
devices as compared to their conventional ac-dc ac counterparts. Simulation
studies of proposed single-phase as well as three-phase topologies are carried
out in MATLAB/Simulink. Hardware implementation of proposed single-phase
topology is done using dSPACE DS1104 R&D controller board and results are
presented.
KEYWORDS:
1.
Ac-chopper
2.
Buck-boost converter
3.
Dc-link modulation
4.
Inverter
5.
Variable-voltage variable-frequency
6.
V/f induction motor drive
SOFTWARE:
MATLAB/SIMULINK
BLOCK DIAGRAM:
Fig.
1. Block diagram for the proposed topology.
EXPECTED SIMULATION RESULTS:
(a)
Plot of output voltage (rms) of inverter v/s duty ratio.
(b)
Output voltage waveform of the proposed inverter: [X-axis: 1 div. = 0.01 s,
Y-axis: 1 div. = 100 V].
(c)
Output voltage of conventional inverter for unipolar SPWM: [X-axis: 1 div. =
0.01 s, Y-axis: 1 div. = 100 V].
(d)
FFT plot of the output voltage with the proposed topology.
(e)
FFT plot of output voltage with unipolar SPWM inverter.
Fig.
2. Analysis of the proposed topology.
(a)
Output voltage of the proposed topology: [X-axis: 1 div. = 0.01 s, Y-axis:
1
div. = 50 V].
(b)
Comparison of reference voltage and input voltage (upper trace), comparison of
reference voltage and output voltage (lower trace) of buck-boost converter Upper
trace: [X-axis: 1 div. = 0.01 s, Y-axis: 1 div. = 100 V] Lower trace: [X-axis:
1 div. = 0.01 s, Y-axis: 1 div. = 50 V].
(c)
Output voltage and reference voltage of buck-boost converter at f=10 Hz,
f=20
Hz, f=25 Hz: [X-axis: 1 div. = 0.01 s, Y-axis: 1 div. = 100 V].
(d)
Output voltage and reference voltage of buck-boost converter at f=30 Hz,
f=40
Hz, f=50 Hz: [X-axis: 1 div. = 0.01 s, Y-axis: 1 div. = 100 V].
Fig.
3 Simulation results of the proposed buck-boost converter.
(b)
Gate pulses of MOSFETs M2 and M3, Comparison of input voltage and reference
voltage, Gate pulses M1, M2, M3: [X-axis: 1 div. = 0.002 s, Y-axis: 1 div. = 1
V], Voltage: [X-axis: 1 div. = 0.002 s, Y-axis: 1 div. = 100 V].
(c)
Output voltage waveforms of buck-boost converter without La Output voltage of
buck-boost converter and reference voltage with La: [X-axis: 1 div. = 0.02 s,
Y-axis: 1 div. = 50 V], Output voltage of inverter with La: [Xaxis: 1 div. =
0.02 s, Y-axis: 1 div. = 100 V].
(d)
Output voltage of buck-boost converter and inverter and inverter with La Blue
color: Reference voltage, Green color: Actual output voltage of buckboost converter,
Output voltage of buck-boost converter and reference voltage without La:
[X-axis: 1 div. = 0.02 s, Y-axis: 1 div. = 50 V], Output voltage of inverter
without La: [X-axis: 1 div. = 0.02 s, Y-axis: 1 div. = 100 V].
Fig.
4 Results for improving output voltage of inverter.
(b)
Pole voltage of phase A and output of buck-boost converter compared with reference
voltage of three-phase system Blue color: Reference voltage Green color: Actual
output voltage of buck-boost converter for three-phase Pole voltage of phase A:
[X-axis: 1 div. = 0.05 s, Y-axis: 1 div. = 50 V] Output voltage of buck-boost
converter of phase A: [X-axis: 1 div. = 0.05 s,
Y-axis:
1 div. = 50 V].
Fig.
5 Simulation result of proposed three-phase topology.
CONCLUSION:
Relation between fundamental output
voltage (rms) and duty ratio of switches of ac chopper operating as inverter is
linear. So, on increasing the duty ratio of pulses given to switches, output
voltage of inverter increases linearly. To get 100 % inverter output voltage,
no need to go in over modulation region, which eliminates the non-linearity.
The profile of output voltage of inverter (with chopping depending on the duty
ratio of its switches) is sinusoidal because of modulated dc-link provided by
the buck-boost converter, which reduces lower order harmonics, and %THD.
It also reduces dv/dt as envelope of output voltage is sinusoidal as
full dc-link voltage is not switched. This reduction in dv/dt reduces
the stresses on the enameled copper wire of the stator winding of the motor. It
will reduce the inter-turn short circuit failure of stator winding. Also this
reduction of dv/dt will reduce the electromagnetic interference
generated by the inverter in the drive system. In the proposed scheme, output voltage
of buck-boost converter follows the reference voltage very closely for
different frequencies, so when reference voltage is greater than input voltage,
converter has to operate in boost mode else operates in buck mode. Hardware
implementation of proposed single phase scheme is carried out. The hardware
results have very close resemblance with the simulation results. The proposed concept
is novel, and with appropriate refinements, can offer new era of control of
inverter for V/f three-phase induction motor drive applications. However, it
demands more number of power semiconductor devices compared to that needed for
the conventional ac-dc-ac approach.
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