Improving the Performance of Cascaded H-bridge based Interline Dynamic Voltage Restorer

IEEE Transactions on Power Delivery, 2015

ABSTRACT:

An interline dynamic voltage restorer (IDVR) is a new device for sag mitigation which is made of several dynamic voltage restorers (DVRs) with a common DC link, where each DVR is connected in series with a distribution feeder. During sag period, active power can be transferred from a feeder to another one and voltage sags with long durations can be mitigated. IDVR compensation capacity, however, depends greatly on the load power factor and a higher load power factor causes lower performance of IDVR. To overcome this limitation, a new idea is presented in this paper which allows to reduce the load power factor under sag condition, and therefore, the compensation capacity is increased. The proposed IDVR employs two cascaded H-bridge multilevel converters to inject AC voltage with lower THD and eliminates necessity to low-frequency isolation transformers in one side. The validity of the proposed configuration is verified by simulations in the PSCAD/EMTDC environment. Then, experimental results on a scaled-down IDVR are presented to confirm the theoretical and simulation results.

KEYWORDS:

1.      Back-to-back converter

2.      Cascaded H-bridge

3.      Interline dynamic voltage restorer

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Power circuit schematic of the IDVR with active power exchanging capability.

EXPECTED SIMULATION RESULTS:

 Fig. 2. Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0.4p.u.

Fig.3. Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0.6p.u.

CONCLUSION:

In this paper, a new configuration has been proposed which not only improves the compensation capacity of the IDVR at high power factors, but also increases the performance of the compensator to mitigate deep sags at fairly moderate power factors. These advantages were achieved by decreasing the load power factor during sag condition. In this technique, the source voltages are sensed continuously and when the voltage sag is detected, the shunt reactances are switched into the circuit and decrease the load power factors to improve IDVR performance. Finally, the simulation and practical results on the CHB based IDVR confirmed the effectiveness of the proposed configuration and control scheme.

REFERENCES:

[1]   P.F. Comesana, D.F. Freijedo, J.D. Gandoy, O. Lopez, A.G. Yepes, J. Malvar, "Mitigation of voltage sags, imbalances and harmonics in sensitive industrial loads by means of a series power line conditioner" Electric Power systems Research 84 (2012) 20–30

[2]   [2] A. Felce, S. A. C. A. Inelectra, G. Matas, and Y. Da Silva, “Voltage Sag Analysis and Solution for an Industrial Plant with Embedded Induction Motors,” In Industry Applications Conference, 2004. 39th IAS Annual Meeting. Conference Record of the 2004 IEEE, vol. 4, pp. 2573-2578. IEEE, 2004.

[3]   [3] A. Sannino, M. G. Miller, and M. H. J. Bollen, "Overview of voltage sag mitigation", Proc. IEEE Power Eng. Soc. Winter Meeting, vol. 4, pp.2872 -2878 2000

[4]   [4] E. Babaei, M. F. Kangarlu, and M. Sabahi, “Mitigation of voltage disturbances using dynamic voltage restorer based on direct converters,” IEEE Trans. Power Del., vol. 25, no. 4, pp. 2676–2683, Oct. 2010

[5]   [5] H. K. Al-Hadidi , A. M. Gole and D. A. Jacobson “A novel configuration for a cascade inverter-based dynamic voltage restorer with reduced energy storage requirements“, IEEE Trans. Power Del., vol. 23, no. 2, pp.881 -888 2008 .

A Two Degrees of Freedom Resonant Control Scheme for Voltage Sag Compensation in Dynamic Voltage Restorers

IEEE Transactions on Power Electronics, 2017

ABSTRACT:

This paper presents a two degrees of freedom (2DOF) control scheme for voltage compensation in a dynamic voltage restorer (DVR). It commences with the model of the DVR power circuit, which is the starting point for the control design procedure. The control scheme is based on a 2DOF structure implemented in a stationary reference frame (α−β), with two nested controllers used to obtain a pass-band behavior of the closed-loop transfer function, and is capable of achieving both a balanced and an unbalanced voltage sag compensation. The 2DOF control has certain advantages with regard to traditional control methods, such as the possibility of ensuring that all the poles of the closed-loop transfer function are chosen without the need for observers and reducing the number of variables to be measured. The use of the well-known double control- loop schemes which employ feedback current controllers to reduce the resonance of the plant is, therefore, unnecessary. A simple control methodology permits the dynamic behavior of the system to be controlled and completely defines the location of the poles. Furthermore, extensive simulations and experimental results obtained using a 5 kW DVR laboratory prototype show the good performance of the proposed control strategy.

KEYWORDS:

1.      Power Quality

2.      Dynamic Voltage Restorer (DVR)

3.      Control Design

4.      Resonant Controller

5.      Stationary Frame Controller

6.      Voltage Sag.

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Power system with a DVR included.

 EXPECTED SIMULATION RESULTS:

Figure 2. DVR simulation for a balanced voltage sag. (a) Line-to-neutral

three-phase voltages at PCC, (b) line-to-neutral voltages generated by the

DVR, (c) line-to-neutral load voltages, and (d) error signal in α − β (redblue).

Figure 3 DVR simulation for an unbalanced voltage sag. (a) Line-to-neutral

three-phase voltages at PCC, (b) line-to-neutral voltages generated by the

DVR, (c) line-to-neutral load voltages, and (d) error signal in α − β (redblue).

Figure 4. DVR simulation for a 30 % balanced voltage sag. (a) Line-toneutral

three-phase voltages at PCC, (b) error signal in α − β (red-blue) for

the 2DOF-Resonant scheme, (c) error signal in α − β (red-blue) for doubleloop

scheme, and (d) error signal in α−β (red-blue) for the double-loop with

Posicast scheme.

Figure 5. DVR simulation for a 30 % type-E unbalanced voltage sag. (a)

Line-to-neutral three-phase voltages at PCC, (b) error signal in α − β (redblue)

for the 2DOF-Resonant scheme, (c) error signal in α − β (red-blue)

for double-loop scheme, and (d) error signal in α − β (red-blue) for the

double-loop with Posicast scheme.

  CONCLUSION:

This paper presents a control scheme based on two nested controllers for voltage sag compensation in a DVR. The nested regulators provide the control with two degrees of freedom,

and the control scheme is implemented in the stationary reference frame. Furthermore, in order to accomplish the requirements for voltage sag compensation, it is necessary to track the component at the fundamental frequency. This is achieved using a resonant term in one of the controllers. The proposed control design methodology is able to define all the poles of the closed-loop system without observers and with a reduction in the number of variables that must be measured, thus making it possible to avoid the use of the traditional current loop employed in control schemes for the DVR. The structure with the nested regulators achieves perfect zero tracking error at the nominal frequency and blocks the DC offset, signifying that it has some advantages over other control methods, such as double-loop schemes with proportional-resonant regulators. Moreover, the design methodology is thoroughly explained when the delay in the calculations is taken into account.

In this case, the design procedure allows the dominant poles of the closed-loop system to be chosen. If the closed-loop poles are chosen carefully, this control structure can also be applied to other systems which require higher delays, e.g., power converter applications with a reduced switching frequency. The design methodology can additionally be extended to the discrete domain. Comprehensive simulated and experimental results corroborate the performance of the 2DOF-Resonant control scheme for balanced and unbalanced voltage sags. The proposed control scheme is able to compensate both types of voltage sags with a very fast transient response and an accurate tracking of the reference voltage, even when the different types of loads and frequency deviations of the grid voltages are considered. Extended comparisons with a PR controller using a double-loop scheme and a PR controller in a double loop with a Posicast regulator have been carried out, demonstrating that the performance of the 2DOF-Resonant controller is superior in all cases. Moreover, the study of the stability as regards parameter variations for the compared control schemes demonstrates the more robust behavior of the 2DOF-Resonant control scheme.

REFERENCES:

[1]         V. H. M. Quezada, J. R. Abbad, and T. G. S. Rom´an, “Assessment of energy distribution losses for increasing penetration of distributed generation,” IEEE Transactions on Power Systems, vol. 21, no. 2, pp. 533–540, May 2006.

[2]         M. K. Jukan, A. Jukan, and A. Toki´c, “Identification and assessment of key risks and power quality issues in liberalized electricity markets in europe,” International Journal of Engineering & Technology, vol. 11, no. 03, pp. 20–26, 2011.

[3]         EN-50160, European Standard EN-50160. Voltage Characteristics of Public Distribution Systems, CENELEC Std., November 1999.

[4]         IEEEStd. 1547, IEEE Std. 1547-2003. Standard for Interconnecting Distributed Resources with Electric Power Systems, IEEE Std., June 2003.

[5]         O. P. Mahela and A. G. Shaik, “Topological aspects of power quality improvement techniques: A comprehensive overview,” Renewable and Sustainable Energy Reviews, vol. 58, pp. 1129–1142, May 2016.

Dynamic Voltage Restorer Using Switching Cell Structured Multilevel AC-AC Converter

IEEE Transactions on Power Electronics, 2016

ABSTRACT:

Dynamic voltage restorer (DVR) technology has become a mature power quality product. In high-power applications, DVR using a multilevel converter is commonly used. However, DVR using a multilevel direct pulse width modulation (PWM) ac-ac converter has not been well studied. This paper presents a new DVR topology using a cascaded multilevel direct PWM ac-ac converter. In the proposed scheme, the unit cell of the multilevel converter consists of a single-phase PWM ac-ac converter using switching cell (SC) structure with coupled inductors. Therefore, the multilevel converter can be short- and open-circuited without damaging the switching devices. Neither lossy RC snubber nor a dedicated soft commutation strategy is required in the proposed DVR. This improves the reliability of the DVR system. The output voltage levels of the multilevel converter increase with the number of cascaded unit cells, and a high ac output voltage is obtained by using low-voltage-rating switching devices. Furthermore, a phase-shifted PWM technique is applied to significantly reduce the size of the output filter inductor. A 1-kW prototype of single-phase DVR is developed, and its performance is experimentally verified. Finally, the simulation results are shown for a three-phase DVR system.

KEYWORDS:

1.      Commutation problem

2.      coupled inductor

3.      direct PWM AC-AC converter

4.       dynamic voltage restorer (DVR)

5.      multilevel converter

6.      pulse width modulation (PWM)

7.      switching cell (SC)

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig. 1. Three-phase DVR systems using VSI [2]. (a) DVR with energy storage. (b) DVR with no energy storage.

EXPECTED SIMULATION RESULTS:

(a)

(b)

(c)

Fig. 2. Simulated waveforms of the three-phase DVR ( v_oa=v_ob=v_oc=220 V_rms,P_o=3kW, )

CONCLUSION:

In this paper, a new DVR system, employing the proposed cascaded multilevel direct PWM ac-ac converter, was presented. Compared with the conventional DVR topologies using the VSI, the proposed scheme has the advantages of fewer power stages, higher efficiency, and the elimination of bulky dc-link capacitor. In addition, unlike the existing DVR with the direct PWM ac-ac converter, the proposed DVR ensures stable operation because the proposed cascaded multilevel ac-ac converter has the following unique advantages over the conventional ac-ac converters.

·         It is immune to EMI noise because the switching devices are not damaged by the EMI noise’s misgating on- or off.

·         The commutation problem found in the conventional ac-ac converters can be effectively eliminated without using either dedicated soft commutation strategy or lossy RC snubber circuits.

·         It operates properly even with highly distorted input voltage, which is impossible with the conventional approach using soft commutation strategy.

Furthermore, the proposed multilevel ac-ac converter can obtain high ac output voltage with low-voltage-rating switching devices by cascading unit cells. The equivalent output frequency of the multilevel converter is increased by using a phase-shifted PWM technique, which reduces the size of the output LC filter. The performance of the proposed DVR is successfully verified by using a 1-kW prototype. Finally, a three-phase DVR system using the proposed scheme is verified through simulation.

REFERENCES:

[1]         B.-H. Kwon, G. Y. Jeong, S.-H. Han, and D. H. Lee, “Novel line conditioner with voltage up/down capability,” IEEE Trans. Ind. Electron., vol. 49, no. 5, pp. 1110–1119, Oct. 2002.

[2]         J. Nielsen and F. Blaabjerg, “A detailed comparison of system topologies for dynamic voltage restorers,” IEEE Trans. Ind. Appl., vol. 41, no. 5, pp. 1272–1280, Sep./Oct. 2005.

[3]         E. C. Aeoliza, N. P. Enjeti, L. A. Moran, O. C. Montero-Hernandez, and S. Kim, “Analysis and design of a novel voltage sag compensator for critical loads in electrical power distribution systems,” IEEE Trans. Ind. Appl., vol. 39, no. 4, pp. 1143–1150, Jul./Aug. 2003.

[4]         W. E. Brumsickle, R. S. Schneider, G. A. Luckjiff, D. M. Divan, and M. F. McGranaghan, “Dynamic sag correctors: Cost-effective industrial power line conditioning,” IEEE Trans. Ind. Appl., vol. 37, no. 1, pp. 212– 217, Jan./Feb. 2001.

A Novel DVR-ESS-embedded wind energy conversion system

IEEE Transactions on Sustainable Energy, 2017

ABSTRACT: This paper proposes a novel double-fed induction generator (DFIG)-based wind-energy conversion system (WECS), which incorporates a dynamic voltage restorer (DVR) and energy storage system (ESS). The DVR is in series with the output terminal of a wind turbine generator (WTG) and parallel to the dc link of the WTG with the ESS. The control scheme of the WECS is designed to suppress wind power fluctuations and compensate grid voltage disturbances, which in turn improve the fault ride through (FRT) capability and the wind power penetration level. Finally, the performance of this WECS is investigated under various operation scenarios such as symmetrical and asymmetrical grid faults.

KEYWORDS:

1.      Double-fed induction generator (DFIG)

2.      Energy storage system (ESS)

3.      Wind power fluctuations

4.      Dynamic Voltage Restorer (DVR)

5.      Fault Ride Through (FRT).

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Structure of the novel DVR-ESS-embedded WECS

EXPECTED EXPERIMENTAL RESULTS:

Fig. 2. Symmetrical grid fault with 50% voltage dip. (a) Grid voltage. (b) Compensation voltage. (c) WTG’s terminal voltage. (d) RSC/GSC current RMS. (e) Power response. (f) Additional power response. (g) State of charge. (h) DC link voltage.

Fig. 3. Symmetrical grid fault with 90% voltage dip. (a) Grid voltage. (b) Compensation voltage. (c) WTG’s terminal voltage. (d) RSC/GSC current RMS. (e) Power response. (f) Additional power response. (g) State of charge. (h) DC link voltage.

Fig. 4. System performance under asymmetrical grid fault. (a) Grid voltage. (b) Compensation voltage. (c) WTG’s terminal voltage. (d) RSC/GSC current RMS. (e) Power response. (f) Additional power response. (g) State of charge. (h) DC link voltage.

Fig. 5. Different sequence components in d-q reference frame. (a) Positive-sequence components in d-axis. (b) Positive-sequence components in q-axis. (c) Negative-sequence components in d-axis. (d) Negative-sequence components in q-axis

                                              

                                                     Fig.6 Crowbar scheme                                                      

  Fig.7 WECS scheme

CONCLUSION:

In this paper, a novel DVR-ESS-embedded WECS is proposed. The system configuration and its control scheme are designed, and simulations are conducted under normal operation and fault operation conditions to test the system performance. The main conclusions are as follows. The embedded ESS can store surplus wind power for release when needed. By designing different power output commands, i.e., constant output power or filtered output power, the ESS can effectively suppress the wind power fluctuations and further improve the penetration level of wind power. The use of a DVR can significantly improve the FRT capability of the WECS under symmetrical and asymmetrical voltage fault conditions, and is particularly suitable for already installed DFIG-WTGs that do not possess sufficient FRT capability. During a disturbance, the blocked wind power generation is stored for subsequent use to suppress wind power fluctuations without any loss of energy.

REFERENCES:

[1]   T. Ackermann, “Wind Power in Power Systems,” 2nd ed., Chichester: Wiley-Blackwell, 2012.

[2]   International Electrotechnical Commission, “Grid integration of large capacity renewable energy sources and use of large capacity electrical energy storage,” White paper, 2012.

[3]   A. McDonald and G. Jimmy, “Parallel wind turbine powertrains and their design for high availability,” IEEE Trans. Sustain. Energy, vol. 8, no. 2, pp. 880-890, Apr. 2017.

[4]   J. Yao, H. Li, Z. Chen, X, Xia, X, Chen, Q, Li, and Y, Liao, “Enhanced control of a DFIG-based wind-power generation system with series grid-side converter under unbalanced grid voltage conditions,” IEEE Trans. Power Electron., vol. 28, no.7, pp. 3167-3181, Jul. 2013.