A Single-Phase Cascaded Multilevel Inverter Composed of Four-Level Sub-multilevel Cells

 ABSTRACT

This paper presents a novel cascaded multilevel inverter topology. The series connection of proposed basic cells is the main core of this topology. Different methods to determine the values of DC voltage sources in cells are investigated. Advantages and disadvantages of this topology in comparison with classical topologies are discussed. Symmetric and asymmetric structures of this topology are well analyzed through simulations.

KEYWORDS

1.      Cascaded multilevel inverter

2.      Single phase

SOFTWARE: MATLAB/SIMULINK

 GENERAL SCHEMATIC CIRCUIT DIAGRAM:

Fig.. 1. General scheme of proposed cascaded multilevel inverter

EXPECTED SIMULATION RESULTS

Fig. 2. Simulation results of two-cell proposed inverter Symmetric design: (a) va (b) Vaal and iout(c) THD

Asymmetric design: (d) va (e) Vout and iout(f) THD

Fig.3.The blocking voltage of  switches(a) S₁₁ and S₁₂ (b)S₂₁ and  S₂₂  (c)S₃₁ and S₃₂ (d)S₄₁ and S₄₂ (e) S_a (f) S_b  (g) T₁ and T₄ (h)  T₂ and T₃.

 CONCLUSION

In this paper a new structure for multilevel inverters based on series connection of four-level sub-multilevel basic cells is proposed. The H-bridge inverter and additional circuit have been added to the basic form of the proposed inverter in order to generate positive and negative polarities and facilitate the symmetric and asymmetric implementations regarding the values of the dc sources. Different methods are suggested to choose the values of the dc sources and they are appraised by comparison studies with classical cascaded H-bridge inverter. The results of this survey illustrate the fact that the number of switches and the total blocking voltage of the inverter are reduced for the proposed topology compared to the classical ones. Finally, the simulation results on a two-cell inverter with symmetric and asymmetric implementation confirm the proper performance of the proposed topology.

REFERENCES

[I] 1. Franquelo, J. Rodriguez, J. Leon, S. Kouro, R. Portillo, and M. EPrlaectst,ro "nT. hMea ga.g, e of multilevel converters arrives," IEEE Ind. vol. 2, no. 2, pp. 28-39, Jun. 2008.

[2] J. Rodriguez, S. Member, J. Lai, and S. Member, "Multilevel Inverters : A Survey of Topologies , Controls , and Applications," IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724-738,2002.

[3] J. Rodriguez, 1. G. Franquelo, S. Kouro, J. I. Leon, R. C. Portillo, M. A. M. Prats, and M. A. Perez, "Multilevel Converters: An Enabling Technology for High-Power Applications," Proc. IEEE, vol. 97, no. II, pp. 1786-1817, Nov. 2009.

[4] J.-S. 1. J.-S. Lai and F. Z. P. F. Z. Peng, "Multilevel converters-a new breed of power converters," lAS '95. Coif. Rec. 1995 IEEE Ind. Appl. Can! Thirtieth lAS Annu. Meet., vol. 3, no. 3, pp. 509-517,1995.

[5] M. Malinowski, K. Gopakumar, J. Rodriguez, and M. A. Perez, E"Ale cStruorvne.,y on Cascaded Multilevel Inverters," IEEE Trans. Ind. vol. 57, no. 7, pp. 2197-2206, Jul. 2010.

A Novel 7-Level Cascaded Inverter for Series Active Power Filte

 ABSTRACT:

Harmonic voltage compensation of the load connected to the point of common coupling (PCC) by using a series of active power filter (SAPF) based on a single phase cascaded multilevel inverter is proposed. The proposed multilevel inverter are presented in detail. The inverter has the ability of acting as a harmonic source when the reference is a non-sinusoidal signal. To achieve this, a simple control technique is performed with the proposed inverter. A prototype of 7-level inverter based SAPF is manufactured without using a parallel passive filter (PPF) because it is designed to show SAPF own compensation capacity alone. Filtering ability of the SAPF is shown both in simulation and experimental studies. The validity of the proposed inverter based SAPF is verified by simulation as well as experimental study. The results show that the proposed multi-level inverter is suitable for SAPF applications.

KEYWORDS:

1.      Active power filter

2.      Multilevel inverter

3.      Harmonic compensation

4.      Half-bridge cascaded

5.      Power quality

SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

Fig. 1. The scheme of the proposed system.

EXPECTED SIMULATION RESULTS:

(a) Simulation result (50 V/div), (5 ms/div)

Fig. 2. The waveform of VPCC before compensation

(a) Simulation result (50 V/div), (5 ms/div)

Fig. 3. The waveforms of the load voltage and the proposed inverter voltage after compensation.

CONCLUSION:

This paper proposes a single phase cascaded inverter based SAPF. The 7-level inverter topology and operation principle is introduced. With the proposed topology, the number of output levels can easily be increased. Switching signals of the semiconductor devices used in the inverter are also obtained by a simple method. A SAPF with the proposed inverter topology is simulated.The aim of the simulation is to compensate the load voltage harmonics connected to PCC. In addition to the simulation, the proposed SAPF prototype is designed. Using this prototype, experimental study is performed. Simulation and experimental results similar each other proves the accuracy of the analysis. The load waveform that is highly distorted with a THD value of 24.12% is compensated with the proposed inverter based SAPF and the THD value is reduced to 3.80% in experimental study. This shows that the proposed inverter is suitable for SAPF applications.

REFERENCES:

[1] M. I. M. Montero, E. R. Cadaval, F. B. Gonzalez, “Comparison of control strategies for shunt active power filters in three-phase four-wire systems”, IEEE Trans. Power Electron., vol. 22, no. 1, pp. 229–236, 2007.

[2] F. Z. Peng, H. Akagi, and A. Nabae, “A new approach to harmonic compensation in power systems—A combined system of shunt passive and series active filters,” IEEE Trans. Ind. Appl., vol. 26, no. 6, pp. 983– 990, Nov./Dec. 1990.

[3] Z. Wang, Q. Wang, W. Yao, and J. Liu, “A series active power filter adopting hybrid control approach,” IEEE Trans. Power Electron., vol. 16, no. 3, pp. 301–310, May 2001.

[4] H. Akagi, “Trends in active power line conditioners,” IEEE Trans. Power Electron., vol. 9, no. 3, pp. 263–268, May 1994.

[5] M. El-Habrouk, M. K. Darwish, and P. Mehta, “Active power filters: A review,” IEE Electr. Power Appl., vol. 147, no. 5, pp. 403–413, Sep. 2000.

A New Six-Switch Five-Level Active Neutral Point Clamped Inverter for PV Application

ABSTRACT:

 Multilevel inverters are one of the preferred solutions for medium-voltage and high-power applications and have found successful industrial applications. Five-level Active Neutral Point Clamped inverter (5L-ANPC) is one of the most popular topologies among five-level inverters. A Six-Switch 5L-ANPC (6S-5L-ANPC) topology is proposed. Compared to the conventional 5L-ANPC inverters, the 6S-5L-ANPC reduces two active switches and has lower conduction loss. The proposed modulation enables the 6S-5L-ANPC inverter to operate under both active and reactive power conditions. The FC capacitance is designed under both active and reactive power conditions. The analysis shows the proposed topology is suitable for photovoltaic (PV) grid-connected applications. A 1KVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method.

KEYWORDS:

1.      Multilevel inverter

2.      Active Neutral Point Clamped (ANPC)

3.      Flying-Capacitor (FC)

4.      PWM modulation

SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

Fig.1. Configuration of the proposed 6S-5L-ANPC inverter.

 EXPECTED SIMULATION RESULTS

Fig. 2. Simulation results with 310 uF FC value under unity power factor condition. (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current. (d) THD of output current.

Fig. 3. Simulation results with 310 uF FC value under reactive power operation (PF = 0.9). (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current. (d) THD of output current.

Fig. 4. Simulation results with 56 uF FC value under unity power factor condition. (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current. (d) THD of output current.

Fig. 5. Simulation results with 56 uF FC value under reactive power operation (PF = 0.9). (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current. (d) THD of output current.

Fig. 6. Simulation results under low switching frequency operation (PF = 1). (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current.

Fig. 7. Simulation results under low switching frequency operation (PF = 0.9). (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current.

Fig. 8. Simulation results with 15% FC voltage drop using different FC value.

CONCLUSION:

In this paper, a novel 6S-5L-ANPC inverter topology has been proposed. As compared with the conventional 5L-ANPC inverter, it requires only 6 switches for single phase, a reduction from 8 switches. The operating principles and switching states are presented. The results of comparison between 6S-5L-ANPC and the conventional 5L-ANPC topologies show that 6S-5L-ANPC topology has lower conduction loss and thus higher efficiency in high power condition. The specific modulation strategy of 6S-5L-ANPC inverter under reactive power operation has been proposed. Issues related to the DC-link capacitors and FC voltages balancing and the maximum reactive power capability are discussed. The equations to calculate the FC capacitance value in active and reactive power conditions are provided. Computer simulation and experimental prototype based on a single phase 1KVA prototype have been carried out in both active and reactive power conditions to demonstrate the reliability of the proposed topology and modulation method.

REFERENCES:

[1] F. Z. Peng, W. Qian, and D. Cao, “Recent advances in multilevel converter / inverter topologies and applications,” in Proc. IPEC, 2010, pp. 492–501.

[2] J. Rodriguez, Jih-Sheng Lai, and Fang Zheng Peng, “Multilevel inverters: a survey of topologies, controls, and applications,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724–738, Apr. 2002.

[3] A. Sanchez-ruiz, M. Mazuela, S. Alvarez, G. Abad, and I. Baraia, “Medium voltage–high power converter topologies comparison procedure, for a 6.6 kV drive application using 4.5 kV IGBT modules,” IEEE Trans. Ind. Electron., vol. 59, no. 3, pp. 1462–1476, Mar. 2012.

[4] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. W. Bin Wu, J. Rodriguez, M. a. Pérez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553–2580, Aug. 2010.

[5] J. Rodríguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, “The age of multilevel converters arrives,” IEEE Ind. Electron. Mag., vol. 2, no. 2, pp. 28–39, Jun. 2008.

A Multilevel Inverter Structure based on Combination of Switched-Capacitors and DC Sources

ABSTRACT:

This paper presents a switched-capacitor multilevel inverter (SCMLI) combined with multiple asymmetric DC sources. The main advantage of proposed inverter with similar cascaded MLIs is reducing the number of isolated DC sources and replacing them with capacitors. A self-balanced asymmetrical charging pattern is introduced in order to boost the voltage and create more voltage levels. Number of circuit components such as active switches, diodes, capacitors, drivers and DC sources reduces in proposed structure. This multi-stage hybrid MLI increases the total voltage of used DC sources by multiple charging of the capacitors stage by stage. A bipolar output voltage can be inherently achieved in this structure without using single phase H-bridge inverter which was used in traditional SCMLIs to generate negative voltage levels. This eliminates requirements of high voltage rating elements to achieve negative voltage levels. A 55-level step-up output voltage (27 positive levels, a zero level and 27 negative levels) are achieved by a 3-stage system which uses only 3 asymmetrical DC sources (with amplitude of 1Vin, 2Vin and 3Vin) and 7 capacitors (self-balanced as multiples of 1Vin). MATLAB/SIMULINK simulation results and experimental tests are given to validate the performance of proposed circuit.

KEYWORDS:

1.      Multi-level inverter

2.      Switched-capacitor

3.      Bipolar converter

4.      Asymmetrical

5.      Self-balancing

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig (1) Three stage structure of the proposed inverter

EXPECTED SIMULATION RESULTS

Fig (2) Waveform of the output voltage in (a) 50Hz and pure resistive load (b)

the inset graphs of voltage and current

Fig (3) waveform of the output voltage in 50Hz with resistive-inductive load

Fig (4) Capacitor’s voltage in 50Hz (a) middle stage (b) last stage

CONCLUSION:

In this paper, a multilevel inverter based on combination of multiple DC sources and switched-capacitors is presented. Unlike traditional converters which used H-bridge cell to produce negative voltage that the switches should withstand maximum output AC voltage, the suggested structure has the ability of generating bipolar voltage (positive, zero and negative), inherently. Operating principle of the proposed SCMLI in charging and discharging is carried out. Also, evaluation of reliability has been done and because of high number of redundancy, there has been many alternative switching states which help the proposed structure operate correctly even in fault conditions. For confirming the superiority than others, a comprehensive comparison in case of number of devices and efficiency is carried out and shows that the proposed topology has better performance than others. For validating the performance, simulation and experimental results are brought under introduced offline PWM control method.

REFERENCES:

[1] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, “The age of multilevel converters arrives,” IEEE Trans. Ind. Electron. Mag., vol. 2, no. 2, pp. 28–39, June, 2008.

[2] M. Saeedifard, P. M. Barbosa and P. K. Steimer,”Operation and Control of a Hybrid seven Level Converter,” IEEE Trans. Power Electron., vol. 27, no.2, pp. 652–660, February, 2012.

[3] A. Nami. “A New Multilevel Converter Configuration for High Power High Quality Application,” PhD Thesis, Queensland University of Technology, 2010.

[4] V. Dargahi, A. K. Sadigh, M. Abarzadeh, S. Eskandari and K. Corzine, “A new family of modular multilevel converter based on modified flying capacitor multicell converters IEEE Trans. Power Electron., vol. 30, no.

1, pp. 138-147, January, 2015.

[5] I. López, S. Ceballos, J. Pou, J. Zaragoza, J. Andreu, I. Kortabarria and V. G. Agelidis,” Modulation strategy for multiphase Neutral-Point Clamped converters,” IEEE Trans. Power Electron., vol. 31, no. 2, pp. 928–941, March, 2015.

A Seven-Switch Five-Level Active-Neutral-Point-Clamped Converter and Its Optimal Modulation Strategy

 ABSTRACT:

 Multilevel inverters are receiving more attentions nowadays as one of preferred solutions for medium and high power applications. As one of the most popular hybrid multilevel inverter topologies, the Five-Level Active-Neutral-Point-Clamped inverter (5L-ANPC) combines the features of the conventional Flying-Capacitor (FC) type and Neutral-Point-Clamped (NPC) type inverter and was commercially used for industrial applications. In order to further decrease the number of active switches, this paper proposes a Seven-Switch 5L-ANPC (7S-5L-ANPC) topology, which employs only seven active switches and two discrete diodes. The analysis has shown a lower current rating can be selected for the seventh switch under high power factor condition, which is verified by simulation results. The modulation strategy for 7S-5L-ANPC inverter is discussed. A 1KVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method.

KEYWORDS:

1.      Multilevel inverter

2.      Active-Neutral-Point-Clamped (ANPC) inverter

3.      Flying-Capacitor

4.      Pulse-Width-Modulation (PWM)

SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

 Fig.1 (a) Proposed topology.

 EXPECTED SIMULATION RESULTS

Fig. 2. Simulation results under unity power factor condition. (a) Output voltage and FC voltage. (b) T7 current in case 1. (c) T7 current in case 2. (d) T7 current in case 3. (e) T7 current in case 4.

Fig. 3. Simulation results under reactive power condition (PF = 0.9, capacitive). (a) Output voltage and FC voltage. (b) T7 current in case 1. (c) T7 current in case 2. (d) T7 current in case 3. (e) T7 current in case 4

Fig. 4. Simulation results under reactive power condition (PF = 0). (a) Output voltage and FC voltage. (b) T7 current in case 1. (c) T7 current in case 2. (d) T7 current in case 3. (e) T7 current in case 4.

Fig. 5. Experimental results under unity power factor condition: waveforms of inverter output voltage, grid voltage, FC voltage and output current.

CONCLUSION:

In this paper, a novel 7S-5L-ANPC inverter topology has been proposed. As compared with the conventional 5L-ANPC inverter, it requires seven active switches for single phase and a low current rating switch can be selected for the seventh switch under high power factor situation. The operating principles and switching states are presented. The detailed comparison between the proposed topology and the conventional 5L-ANPC topologies in terms of voltage stress and efficiency is made. The specific modulation strategy of 7S-5L-ANPC inverter under reactive power operation has been proposed. Computer simulation and experimental prototype based on a single phase 1KVA prototype have been carried out in unity power factor condition and reactive power condition. The validity and advantages of the proposed topology and modulation method are demonstrated.

REFERENCES:

[1] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. W. Bin Wu, J. Rodriguez, M. a. Pérez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553–2580, Aug. 2010.

[2] F. Z. Peng, W. Qian, and D. Cao, “Recent advances in multilevel converter / inverter topologies and applications,” in Proc. IPEC, 2010, pp. 492–501.

[3] F. Z. Peng, “A generalized multilevel inverter topology with self voltage balancing,” IEEE Trans. Ind. Electron., vol. 37, no. 2, pp. 611–618, Feb. 2001.

[4] J. Rodriguez, Jih-Sheng Lai, and Fang Zheng Peng, “Multilevel inverters: a survey of topologies, controls, and applications,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724–738, Apr. 2002.

[5] L. M. Tolbert, “A Multilevel Modular Capacitor Clamped DC-DC Converter,” in Proc. 41st IAS, 2006, pp. 966–973.