Novel Cascaded Switched-Diode Multilevel Inverter for Renewable Energy Integration

 ABSTRACT:

In this paper, a new topology of two-stage cascaded switched-diode (CSD) multilevel inverter is proposed for medium voltage renewable energy integration. First, it aims to reduce the number of switches along with its gate drivers. Thus, the installation space and cost of a multilevel inverter are reduced. The spike removal switch added in the first stage of the inverter provides a flowing path for the reverse load current, and as a result, high voltage spikes occurring at the base of the stepped output voltage based upon conventional CSD multilevel inverter topologies are removed. Moreover, to resolve the problems related to dc source fluctuations of multilevel inverter used for renewable energy integration, the clock phase-shifting (CPS) one-cycle control (OCC) is developed to control the two-stage CSD multilevel inverter. By shifting the clock pulse phase of every cascaded unit, the staircase-like output voltage waveforms are obtained and a strong suppression ability against fluctuations in dc sources is achieved. Simulation and experimental results are discussed to verify the feasibility and performances of the two-stage CSD multilevel inverter controlled by the CPS OCC method.

KEYWORDS:

1.      Novel cascaded multilevel inverter

2.      Two-stage

3.      One-cycle control

 SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 A new topology of two-stage CSD multilevel inverter has been proposed in this paper. n cascaded basic units and one spike removal switch form the first stage. Then by adding a full-bridge inverter as the second-stage converter, both of the positive and negative output voltage levels are generated. Since the one full-bridge converter in the output side leads to the restriction on high-voltage applications, the proposed topology is suitable for medium-voltage renewable energy integration. The comparisons with the CHB and cascaded half-bridge topologies show that the CSD topology requires less switches and related gate drivers for realizing Nlevel output voltage. As a result, the installation space and cost of the multilevel inverter are reduced. Meanwhile, the spike removal switch added in the first stage provides a flowing path for the reverse load current under R-L loads, thus, the high voltage spikes, due to the collapsing magnetic field in a very short time interval, are removed. The CPS OCC method, which is composed by n similar but dependent OCC controllers, has been designed and implemented to control the CSD multilevel inverter. Simulation and experimental results demonstrate that, by shifting the clock pulse phase of each cascaded unit, the staircase-like voltage waveforms are obtained. Moreover, to evaluate the performance of CPS OCC, in both the simulation and experiment, the DC sources mixed with low frequency ripples are implemented to simulate the DC supply from renewable energy generations, and the comparative results between CPS OCC and CPS SPWM reveal that CPS OCC possesses a superior ability in suppressing the unbalance or low frequency ripples in DC sources. These results demonstrate that the CPS OCC method can be a substitute for conventional controllers to control multilevel inverters for renewable energy integration with improved control performances.

REFERENCES:

[1] M. S. B. Ranjiana, P. S. Wankhade, and N. D. Gondhalekar, “A modified cascaded H-bridge multilevel inverter for solar applications,” in Proc. 2014 Int. Conf. Green Comput. Commun. Elect. Eng., 2014, pp. 1–7.

[2] F. S. Kang, S. J. Park, S. E. Cho, C. U. Kim, and T. Ise, “Mutilevel PWM inverters suitable for the use of stand-alone photovoltaic power systems,” IEEE Trans. Energy Convers., vol. 20, no. 4, pp. 906–915, Dec. 2005.

[3] L. V. Nguyen, H.-D. Tran, and T. T. Johnson, “Virtual prototyping for distributed control of a fault-tolerant modular multilevel inverter for photovoltaics,” IEEE Trans. Energy Convers., vol. 29, no. 4, pp. 841–850, Dec. 2014.

[4] J. Rodriguez, J. S. Lai, and F. Z. Peng, “Mutilevel inverters: A survey of topologies, controls, and application,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724–738, Aug. 2002.

[5] F. Z. Peng and J. S. Lai, “Mutilevel converters—A new breed of power converters,” IEEE Trans. Ind. Appl., vol. 32, no. 3, pp. 509–517, May/Jun. 1996.

Comparative Analysis between Five Level Conventional and Modified Cascaded H-Bridge Five Level Inverter Using Multicarrier Pulse width Modulation Techniques

 ABSTRACT:

Multilevel Inverters are getting popular and have become more attractive to researchers in the recent times for high power applications due to their better power quality and higher efficiency as compared to two level inverters. This research work presents a detailed comparative analysis of various multicarrier sinusoidal PWM schemes such as In Phase Disposition, Phase Opposition Disposition and Alternate Phase Opposite Disposition implemented on five level conventional and modified cascaded h-bridge inverters in MATLAB/SIMULINK software. Conventional five level topology uses eight switches and suffers from increased switching complexity while modified five level topology uses only five switches and is recommended to reduce switching complexity and switching losses. It also ensures less number of components, reduced size and overall cost of the system. The effect of modulation index (Ma) on the output harmonic contents in various PWM techniques is also analyzed.

KEYWORDS:

1.      Pulse Width Modulation

2.      Total Harmonic Distortion

3.      Cascaded H-Bridge Multilevel Inverter

4.      Modified Multilevel Inverter

5.      Level Shifted Modulation

6.      Phase Shifted Modulation         

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 It is observed that POD PWM technique has slightly less %THD than IPD and APOD in conventional as well modified MLI. Also, it is concluded that increasing Modulation Index (Ma) reduces %THD. Conventional and Modified MLI has almost same total harmonic distortions but Modified MLI uses only 5 switches whereas Conventional MLI uses 8 switches, hence switching complexity, switching losses and cost of the system is reduced and Modified MLI is recommended to be better choice.

REFERENCES:

[1] B.L Nayak, G. Venkataratnam “ THD and Switching losses Analysis of Multi-Level Inverter Fed 3- Φ Induction Motor Drive”, International Journal of Scientific and Engineering Research, Vol. 5, issue 1,pp 2067-2074”

 [2] E. Beser, B. Arifoglu, S. Camur and E.K Beser “Design and Application of a Single Phase Multilevel Inverter Suitable for using as Voltage Harmonic Source”, Journal of Power Electronics, Vol. 10, No. 2, March 2010.

[3] Y.M Park, H.S Ryu, H.Y Lee, M.G Jung and S.H Lee “Design of Cascaded H-Bridge Multilevel Inverter based on Power Electronics building blocks and control for High Performance”, Journal of Power Electronics, Vol. 10, No. 3, May 2010.

 [4] S. Kouro, K. Gopakumar, J. Pou “Recent Advances and Industrial Applications of Multilevel Converters”, IEEE transaction on Industrial Electronics, Vol. 57, No. 8, August 2010.

[5] P.V Kumar, C.S Kumar and K.R Reddy “ Single Phase Cascaded Multilevel Inverter using Multicarrier PWM Technique”, ARPN Journal of Engineering and Applied Sciences, Vol. 8, No. 10, October 2013.

A Nine-Level T-Type Packed U-Cell Inverter

 ABSTRACT:

This letter proposes a novel nine-level T-type packed U-cell (9L-TPUC) inverter, which consists of one T-type neutral point clamped leg, one half-bridge, two switches and two identical dc sources. And the single carrier modulation scheme can easily produce the corresponding switching sequences, which makes the T-type leg switching under high frequency and other switches operating under low frequency. To further improve the operational efficiency, the T-type leg can be constructed by using SiC devices for withstanding the necessary high frequency switching. The experimental results verified the performance of the proposed topology.1

KEYWORDS:

1.      Packed U-Cell Inverter

2.      Nine-level converter

3.      Single carrier modulation

4.      SiC switch

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 This letter proposes a compact nine-level T-type packed U-cell inverter. Compared with other nine-level inverters, the proposed topology has fewer power semiconductor devices and only needs two isolated dc sources. Furthermore, the proposed PWM scheme only uses one carrier, which can reduce the design and control complexity. Since the T-type leg will generate the high frequency switching waveform, it can be replaced by SiC MOSFETs for significantly reducing switching losses. Experimental results verified the performance of the proposed multilevel topology.

REFERENCES:

 

[1] K. K. Gupta, A. Ranjan, P. Bhatnagar, L. Kumar Sahu, and S. Jain, “Multilevel inverter topologies with reduced device count: A review,” IEEE Trans. Power Electron., vol. 31, no. 1, pp. 135–151, Jan. 2016.

 

[2] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, “Multilevel voltage-source-inverter topologies for industrial medium-voltage drives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930–2945, Dec. 2007.

[3] H. Abu-Rub, J. Holtz, J. Rodriguez, and G. Baoming, “Medium-voltage multilevel inverters: State of the art, challenges, and requirements in industrial applications,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2581–2596, Aug. 2010.

[4] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553–2580, Aug. 2010.

[5] P. R. Bana, K. P. Panda, R. T. Naayagi, P. Siano, and G. Panda, “Recently Developed Reduced Switch Multilevel Inverter for Renewable Energy Integration and Drives Application: Topologies, Comprehensive Analysis and Comparative Evaluation,” IEEE Access, vol. 7, pp. 54888–54909, 2019.

Average Model-Based Feed forward and Feedback Control for PUC5 Inverter

 ABSTRACT:

This paper proposes new average model based control strategies for a 5-level Packed U-cell (PUC5) inverter in both standalone and grid-connected modes of operation. First, a simple feed forward controller (FFC) is designed, using only two pulse width modulation (PWM) carrier signals, for the PUC5 inverter operating in standalone mode. This proposed control technique ensures self-balanced operation with high steady-state performance. Moreover, the employment of the proposed FFC leads to a decrease in the capacitor's value as well as the minimization of the Total Harmonic Distortion (THD). Then, a feedback linearizing control technique is designed to improve the transient and steady-state performances. In grid-connected mode, a reduced-sensor technique based on the FFC and the state feedback (FC) techniques was applied. Simulations and experimental results are presented to prove the high performance of the proposed solutions for standalone and grid-connected operating modes.

KEYWORDS:

1.      Packed U-cell inverter

2.      PUC5

3.      Self-balancing

4.      Average model

5.      Feedback linearizing

6.      Feedforward control

7.      Power quality

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 This work presented novel control strategies for the PUC5 inverter operating in both standalone and grid-connected modes. At a first stage, feed-forward control (FFC) was used to provide self-balancing operation of the PUC5 inverter by an appropriate selection of phase-shift between two carrier signals. The obtained current and voltage waveforms are characterized by a high-quality steady-state and slow dynamic tracking. Therefore, a nonlinear feedback control (FC) was designed to improve the transient and steady-state performances. Simulations and experimental results were provided to validate the proposed techniques. The presented results clearly show the effectiveness of both methods in maintaining a balanced capacitor voltage with high performance in tracking the reference current.

REFERENCES:

[1] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B.Wu, J. Rodriguez, M. A. Pérez, and J. I. Leon, ``Recent advances and industrial applications of multilevel converters,'' IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553_2580, Aug. 2010.

[2] L. Franquelo, J. Rodriguez, J. Leon, S. Kouro, R. Portillo, and M. Prats, ``The age of multilevel converters arrives,'' IEEE Ind. Electron. Mag., vol. 2, no. 2, pp. 28_39, Jun. 2008.

[3] J. Rodriguez, J.-S. Lai, and F. Zheng Peng, ``Multilevel inverters: A survey of topologies, controls, and applications,'' IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724_738, Aug. 2002.

[4] S. Khomfoi and L. M. Tolbert, ``Multilevel power converters,'' in Power Electronics Handbook. Amsterdam, The Netherlands: Elsevier, 2011, pp. 455_486.

[5] K. Al-Haddad, Y. Ounejjar, and L.-A. Gregoire, ``Multilevel electric power converter,'' U.S. Patent 9 331 599, May 3, 2016.

Standalone Operation of Modified Seven-Level Packed U-Cell (MPUC) Single-Phase Inverter

 ABSTRACT:

In this paper the standalone operation of the modified seven-level Packed U-Cell (MPUC)  inverter is presented and analyzed. The MPUC inverter has two DC sources and six switches, which generate seven voltage levels at the output. Compared to cascaded H-bridge and neutral point clamp multilevel inverters, the MPUC inverter generates a higher number of voltage levels using fewer components. The experimental results of the MPUC prototype validate the appropriate operation of the multilevel inverter dealing with various load types including motor, linear, and nonlinear ones. The design considerations, including output AC voltage RMS value, switching frequency, and switch voltage rating, as well as the harmonic analysis of the output voltage waveform, are taken into account to prove the advantages of the introduced multilevel inverter.

KEYWORDS:

1.      Multilevel inverter

2.      Packed u-cell

3.      Power quality

4.      Multicarrier PWM

5.       Renewable energy conversion

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 In this paper a reconfigured PUC inverter topology has been presented and studied experimentally. The proposed MPUC inverter can generate a seven-level voltage waveform at the output with low harmonic contents. The associated switching algorithm has been designed and implemented on the introduced MPUC topology with reduced switching frequency aspect. Switches’ frequencies and ratings have been investigated experimentally to validate the good dynamic performance of the proposed topology. Moreover, the comparison of MPUC to the CHB multilevel inverter showed other advantages of the proposed multilevel inverter topology, including fewer components, a lower manufacturing price, and a smaller package due to reduced filter size.

REFERENCES:

1. Bose, B.K. Multi-Level Converters; Multidisciplinary Digital Publishing Institute: Basel, Switzerland, 2015.

2. Mobarrez, M.; Bhattacharya, S.; Fregosi, D. Implementation of distributed power balancing strategy with a layer of supervision in a low-voltage DC microgrid. In Proceedings of the 2017 IEEE Applied Power Electronics Conference and Exposition (APEC), Tampa, FL, USA, 26–30 March 2017; pp. 1248–1254.

3. Franquelo, L.G.; Rodriguez, J.; Leon, J.I.; Kouro, S.; Portillo, R.; Prats, M.A.M. The age of multilevel converters arrives. IEEE Ind. Electron. Mag. 2008, 2, 28–39. [CrossRef]

4. Malinowski, M.; Gopakumar, K.; Rodriguez, J.; Perez, M.A. A survey on cascaded multilevel inverters. IEEE Trans. Ind. Electron. 2010, 57, 2197–2206. [CrossRef]

5. Nabae, A.; Takahashi, I.; Akagi, H. A new neutral-point-clamped PWM inverter. IEEE Trans. Ind. Appl. 1981, 5, 518–523. [CrossRef]

Reduced DC Link Voltage Active Power Filter Using Modified PUC5 Converter

 ABSTRACT:

In this paper the 5-level Packed U-Cell (PUC5) inverter is reconfigured with two identical DC links operating as an active power filter (APF). Generally, the peak voltage of an APF should be greater than the AC voltage at the point of common coupling (PCC) to ensure boost operation of the converter in order to inject harmonic current into the system effectively; therefore, full compensation can be obtained. The proposed modified PUC5 (MPUC5) converter has two equally regulated separated DC links, which can operate at no load condition useful for APF application. Those divided DC terminals amplitudes are added at the input of the MPUC5 converter to generate a boosted voltage that is higher than the PCC voltage. Consequently, the reduced DC links voltages are achieved since they do not individually need to be higher than the PCC voltage due to the mentioned fact that their summation has to be higher than PCC voltage. The voltage balancing unit is integrated into modulation technique to be decoupled from the APF controller. The proposed APF is practically tested to validate its good dynamic performance in harmonic elimination, AC side power factor correction, reactive power compensation and power quality improvement.

KEYWORDS:

1.      Active Power Filter

2.      PUC5

3.      Harmonic Elimination

4.      Power Factor Correction

5.      Power Quality

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 The MPUC5 configuration has been introduced as a modification to the PUC5 topology with the advantage of DC voltage boosting. It has been employed as an APF with reduced DC link voltages. The voltage balancing between DC capacitors in the APF has been done by the redundant switching states. Since the two capacitors voltages are regulated without external controllers, a simple cascaded control technique has been implemented to keep the sum of two DC voltages values at the reference level as well as synchronizing the source current with grid voltage. Finally, the performance of the MPUC5 APF has been tested practically. Results have shown that the proposed configuration operated well in current harmonic elimination, reactive power compensation and power factor correction.

REFERENCES:

[1] B. Singh, A. Chandra, and K. Al-Haddad, Power Quality: Problems and Mitigation Techniques: John Wiley & Sons, 2014.

[2] S. Rahmani, K. Al-Haddad, H. Y. Kanaan, and B. Singh, "Implementation and simulation of modified PWM with two current control techniques applied to single-phase shunt hybrid power filter," IEE Proc. Electric Power Applications, vol. 153, no. 3, pp. 317-326, 2006.      

[3] H. Zhang, S. J. Finney, A. Massoud, and B. W. Williams, "An SVM algorithm to balance the capacitor voltages of the three-level NPC active power filter," IEEE Trans. Power Electron., vol. 23, no. 6, pp. 2694-2702, 2008.

[4] S. Du, J. Liu, and J. Lin, "Hybrid cascaded H-bridge converter for harmonic current compensation," IEEE Trans. Power Electron., vol. 28, no. 5, pp. 2170-2179, 2013.

[5] M. Sharifzadeh, H. Vahedi, R. Portillo, M. Khenar, A. Sheikholeslami, L. G. Franquelo, et al., "Hybrid SHM-SHE Pulse Amplitude Modulation for High Power Four-Leg Inverter," IEEE Trans. Ind. Electron., vol. 63, no. 11, pp. 7234-7242, 2016.

Real-Time Implementation of a Packed U-Cell Seven-Level Inverter with Low Switching Frequency Voltage Regulator

 ABSTRACT:

In this paper a new cascaded nonlinear controller has been designed and implemented on the packed U-Cell (PUC) seven-level inverter. Proposed controller has been designed based on a simplified model of PUC inverter and consists of a voltage controller as outer loop and a current controller as inner loop. The outer loop regulates the PUC inverter capacitor voltage as the second DC bus. The inner loop is in charge of controlling the flowing current which is also used to charge and discharge that capacitor. The main goal of the whole system is to keep the DC capacitor voltage at a certain level results in generating a smooth and quasi-sine-wave 7-level voltage waveform at the output of the inverter with low switching frequency. The proposed controller performance is verified through experimental tests. Practical results prove the good dynamic performance of the controller in fixing the PUC capacitor voltage for various and variable load conditions and yet generating low harmonic 7-level voltage waveform to deliver power to the loads. Operation as an uninterruptible power supply (UPS) or AC loads interface for photovoltaic energy conversion applications is targeted.

KEYWORDS:

1.      Packed U-Cell

2.      Multilevel Inverter

3.      Voltage Balancing

4.      Nonlinear Controller

5.      Renewable energy conversion

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 In this paper a new cascaded nonlinear controller has been designed for 7-level PUC inverter based on the simple model derived by multilevel inverter topology concept. Experimental results showed appropriate dynamic performance of the proposed controller in stand-alone mode as UPS, renewable energy conversion system or motor drive applications. Different changes in the load and DC bus voltage have been made intentionally during the tests to challenge the controller reaction in tracking the voltage and current references. Proposed controller demonstrated satisfying performance in fixing the capacitor voltage of the PUC inverter, generating seven-level voltage with low harmonic content at the output of  the PUC inverter and ensures low switching frequency operation of those switches. By applying the designed controller on the 7-level PUC inverter it can be promised to have a multilevel converter with maximum voltage levels while using less active switches and DC sources aims at manufacturing a low-cost converter with high efficiency, low switching frequency, low power losses and also low harmonic contents without using any additional bulky filters.

REFERENCES:

[1] H. Abu-Rub, M. Malinowski, and K. Al-Haddad, Power electronics for renewable energy systems, transportation and industrial applications: John Wiley & Sons, 2014.

[2] J. M. Carrasco, L. G. Franquelo, J. T. Bialasiewicz, E. Galván, R. P. Guisado, M. A. Prats, et al., "Power-electronic systems for the grid integration of renewable energy sources: A survey," IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 1002-1016, 2006.

[3] M. Mobarrez, M. G. Kashani, G. Chavan, and S. Bhattacharya, "A Novel Control Approach for Protection of Multi-Terminal VSC based HVDC Transmission System against DC Faults," in ECCE 2015- Energy Conversion Congress & Exposition, Canada, 2015, pp. 4208- 4213.

[4] B. Singh, A. Chandra, and K. Al-Haddad, Power Quality: Problems and Mitigation Techniques: John Wiley & Sons, 2014.

[5] B. Singh, K. Al-Haddad, and A. Chandra, "A review of active filters for power quality improvement," IEEE Trans. Ind. Electron., vol. 46, no. 5, pp. 960-971, 1999.