Standalone Operation of Modified Seven-Level Packed U-Cell (MPUC) Single-Phase Inverter

 ABSTRACT:

In this paper the standalone operation of the modified seven-level Packed U-Cell (MPUC)  inverter is presented and analyzed. The MPUC inverter has two DC sources and six switches, which generate seven voltage levels at the output. Compared to cascaded H-bridge and neutral point clamp multilevel inverters, the MPUC inverter generates a higher number of voltage levels using fewer components. The experimental results of the MPUC prototype validate the appropriate operation of the multilevel inverter dealing with various load types including motor, linear, and nonlinear ones. The design considerations, including output AC voltage RMS value, switching frequency, and switch voltage rating, as well as the harmonic analysis of the output voltage waveform, are taken into account to prove the advantages of the introduced multilevel inverter.

KEYWORDS:

1.      Multilevel inverter

2.      Packed u-cell

3.      Power quality

4.      Multicarrier PWM

5.       Renewable energy conversion

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 In this paper a reconfigured PUC inverter topology has been presented and studied experimentally. The proposed MPUC inverter can generate a seven-level voltage waveform at the output with low harmonic contents. The associated switching algorithm has been designed and implemented on the introduced MPUC topology with reduced switching frequency aspect. Switches’ frequencies and ratings have been investigated experimentally to validate the good dynamic performance of the proposed topology. Moreover, the comparison of MPUC to the CHB multilevel inverter showed other advantages of the proposed multilevel inverter topology, including fewer components, a lower manufacturing price, and a smaller package due to reduced filter size.

REFERENCES:

1. Bose, B.K. Multi-Level Converters; Multidisciplinary Digital Publishing Institute: Basel, Switzerland, 2015.

2. Mobarrez, M.; Bhattacharya, S.; Fregosi, D. Implementation of distributed power balancing strategy with a layer of supervision in a low-voltage DC microgrid. In Proceedings of the 2017 IEEE Applied Power Electronics Conference and Exposition (APEC), Tampa, FL, USA, 26–30 March 2017; pp. 1248–1254.

3. Franquelo, L.G.; Rodriguez, J.; Leon, J.I.; Kouro, S.; Portillo, R.; Prats, M.A.M. The age of multilevel converters arrives. IEEE Ind. Electron. Mag. 2008, 2, 28–39. [CrossRef]

4. Malinowski, M.; Gopakumar, K.; Rodriguez, J.; Perez, M.A. A survey on cascaded multilevel inverters. IEEE Trans. Ind. Electron. 2010, 57, 2197–2206. [CrossRef]

5. Nabae, A.; Takahashi, I.; Akagi, H. A new neutral-point-clamped PWM inverter. IEEE Trans. Ind. Appl. 1981, 5, 518–523. [CrossRef]

Reduced DC Link Voltage Active Power Filter Using Modified PUC5 Converter

 ABSTRACT:

In this paper the 5-level Packed U-Cell (PUC5) inverter is reconfigured with two identical DC links operating as an active power filter (APF). Generally, the peak voltage of an APF should be greater than the AC voltage at the point of common coupling (PCC) to ensure boost operation of the converter in order to inject harmonic current into the system effectively; therefore, full compensation can be obtained. The proposed modified PUC5 (MPUC5) converter has two equally regulated separated DC links, which can operate at no load condition useful for APF application. Those divided DC terminals amplitudes are added at the input of the MPUC5 converter to generate a boosted voltage that is higher than the PCC voltage. Consequently, the reduced DC links voltages are achieved since they do not individually need to be higher than the PCC voltage due to the mentioned fact that their summation has to be higher than PCC voltage. The voltage balancing unit is integrated into modulation technique to be decoupled from the APF controller. The proposed APF is practically tested to validate its good dynamic performance in harmonic elimination, AC side power factor correction, reactive power compensation and power quality improvement.

KEYWORDS:

1.      Active Power Filter

2.      PUC5

3.      Harmonic Elimination

4.      Power Factor Correction

5.      Power Quality

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 The MPUC5 configuration has been introduced as a modification to the PUC5 topology with the advantage of DC voltage boosting. It has been employed as an APF with reduced DC link voltages. The voltage balancing between DC capacitors in the APF has been done by the redundant switching states. Since the two capacitors voltages are regulated without external controllers, a simple cascaded control technique has been implemented to keep the sum of two DC voltages values at the reference level as well as synchronizing the source current with grid voltage. Finally, the performance of the MPUC5 APF has been tested practically. Results have shown that the proposed configuration operated well in current harmonic elimination, reactive power compensation and power factor correction.

REFERENCES:

[1] B. Singh, A. Chandra, and K. Al-Haddad, Power Quality: Problems and Mitigation Techniques: John Wiley & Sons, 2014.

[2] S. Rahmani, K. Al-Haddad, H. Y. Kanaan, and B. Singh, "Implementation and simulation of modified PWM with two current control techniques applied to single-phase shunt hybrid power filter," IEE Proc. Electric Power Applications, vol. 153, no. 3, pp. 317-326, 2006.      

[3] H. Zhang, S. J. Finney, A. Massoud, and B. W. Williams, "An SVM algorithm to balance the capacitor voltages of the three-level NPC active power filter," IEEE Trans. Power Electron., vol. 23, no. 6, pp. 2694-2702, 2008.

[4] S. Du, J. Liu, and J. Lin, "Hybrid cascaded H-bridge converter for harmonic current compensation," IEEE Trans. Power Electron., vol. 28, no. 5, pp. 2170-2179, 2013.

[5] M. Sharifzadeh, H. Vahedi, R. Portillo, M. Khenar, A. Sheikholeslami, L. G. Franquelo, et al., "Hybrid SHM-SHE Pulse Amplitude Modulation for High Power Four-Leg Inverter," IEEE Trans. Ind. Electron., vol. 63, no. 11, pp. 7234-7242, 2016.

Real-Time Implementation of a Packed U-Cell Seven-Level Inverter with Low Switching Frequency Voltage Regulator

 ABSTRACT:

In this paper a new cascaded nonlinear controller has been designed and implemented on the packed U-Cell (PUC) seven-level inverter. Proposed controller has been designed based on a simplified model of PUC inverter and consists of a voltage controller as outer loop and a current controller as inner loop. The outer loop regulates the PUC inverter capacitor voltage as the second DC bus. The inner loop is in charge of controlling the flowing current which is also used to charge and discharge that capacitor. The main goal of the whole system is to keep the DC capacitor voltage at a certain level results in generating a smooth and quasi-sine-wave 7-level voltage waveform at the output of the inverter with low switching frequency. The proposed controller performance is verified through experimental tests. Practical results prove the good dynamic performance of the controller in fixing the PUC capacitor voltage for various and variable load conditions and yet generating low harmonic 7-level voltage waveform to deliver power to the loads. Operation as an uninterruptible power supply (UPS) or AC loads interface for photovoltaic energy conversion applications is targeted.

KEYWORDS:

1.      Packed U-Cell

2.      Multilevel Inverter

3.      Voltage Balancing

4.      Nonlinear Controller

5.      Renewable energy conversion

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 In this paper a new cascaded nonlinear controller has been designed for 7-level PUC inverter based on the simple model derived by multilevel inverter topology concept. Experimental results showed appropriate dynamic performance of the proposed controller in stand-alone mode as UPS, renewable energy conversion system or motor drive applications. Different changes in the load and DC bus voltage have been made intentionally during the tests to challenge the controller reaction in tracking the voltage and current references. Proposed controller demonstrated satisfying performance in fixing the capacitor voltage of the PUC inverter, generating seven-level voltage with low harmonic content at the output of  the PUC inverter and ensures low switching frequency operation of those switches. By applying the designed controller on the 7-level PUC inverter it can be promised to have a multilevel converter with maximum voltage levels while using less active switches and DC sources aims at manufacturing a low-cost converter with high efficiency, low switching frequency, low power losses and also low harmonic contents without using any additional bulky filters.

REFERENCES:

[1] H. Abu-Rub, M. Malinowski, and K. Al-Haddad, Power electronics for renewable energy systems, transportation and industrial applications: John Wiley & Sons, 2014.

[2] J. M. Carrasco, L. G. Franquelo, J. T. Bialasiewicz, E. Galván, R. P. Guisado, M. A. Prats, et al., "Power-electronic systems for the grid integration of renewable energy sources: A survey," IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 1002-1016, 2006.

[3] M. Mobarrez, M. G. Kashani, G. Chavan, and S. Bhattacharya, "A Novel Control Approach for Protection of Multi-Terminal VSC based HVDC Transmission System against DC Faults," in ECCE 2015- Energy Conversion Congress & Exposition, Canada, 2015, pp. 4208- 4213.

[4] B. Singh, A. Chandra, and K. Al-Haddad, Power Quality: Problems and Mitigation Techniques: John Wiley & Sons, 2014.

[5] B. Singh, K. Al-Haddad, and A. Chandra, "A review of active filters for power quality improvement," IEEE Trans. Ind. Electron., vol. 46, no. 5, pp. 960-971, 1999.

 

 

Performance of Three Phase II-level Inverter with reduced number of switches using different PWM Techniques

ABSTRACT:

As compared to conventional inverter topologies like diode clamped and capacitor clamped inverters, the cascaded multilevel inverter has lesser harmonics as well as lower switching stress. The cascaded topology has more number of power switches leading to greater heat losses, larger size, higher cost and more gate drive circuitry. The proposed configuration contains less number of switches and produces lesser harmonics in the output voltage than the cascaded topology. A comparison between four different types of pulse width modulation (PWM) techniques, namely, In-phase disposition (IPD), Anti-phase disposition (APD), Carrier Overlap (CO) and Variable Frequency (VF) PWM methods, has been done. The results have been verified through simulation study in MATLAB/Simulink in order to select the best PWM method that provides minimum THD in the output voltage. An LC filter has been designed to improve the harmonic profile.

KEYWORDS:

1.      Multilevel inverter

2.      PWM technique

3.      Total harmonic distortion

4.      LC filter

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 Three phase eleven level inverter topology with less number of switches is proposed and simulated. Various PWM methods are analyzed and compared. From the simulation results, it was found that VF-PWM provides minimum THD of 12.51 % in the inverter output voltage. This will be the best PWM technique for inverter switching because small inductance can be used in the LC filter placed in series to the inverter output to produce a rectified AC sine wave of low THD of 1.77%.

REFERENCES:

[I] Rodriguez J., Lai J.S., Peng F.Z.'Multilevel inverters: A survey of topologies, controls, and applications'. IEEE Trans. Ind. Electron., vo1.49, no. 4, pp. 724-738, Aug. 2002.

[2] Malinowski, M.; Gopakumar, K.; Rodriguez, J.; Perez, M.A; , "A Survey on Cascaded Multilevel Inverters," Industrial Electronics, IEEE Transactions on , vo1.57, no.7, pp.2197-2206, July 2010.

[3] Balamurugan c.R., Natarajan S.P., Vidhya V.' A New Modified Hybrid HBridge Multilevel Inverter using less Number of Switches'. International Conference on Computation of Power, Energy, Information and Communication (ICCPEIC), 2013, pp 1-6.

[4] Mohamed AS, Norman Mariun, Nasri Sulaiman, MArnran M. Radzi :"A New Cascaded Multilevel Inverter Topology with Minimum Number of Conducting Switches," IEEE Innovative Smart Grid Technologies-Asia (ISGT ASIA) 2014.

[5] Khomfoi S., Praisuwanna N., Tolbert L.M. :"A Hybrid Cascaded Multilevel Inverter Application for Renewable Energy Resources Including a Reconfiguration Technique," Electrical Engineering and Computer Science, The University of Tennessee, USA

Modified Seven-Level Pack U-Cell Inverter for Photovoltaic Applications

ABSTRACT:

This paper proposes a modified configuration of single-phase Pack U-Cell (PUC) multilevel inverter in which the output voltage has higher amplitude than the maximum DC link value used in the topology as a boost operation. The introduced inverter generates seven-level AC voltage at the output using two DC links and six semiconductor switches. Comparing to cascaded H-bridge and neutral point clamp multilevel inverters, the introduced multilevel inverter produces more voltage levels using less components. The proposed inverter is used in PV system where the green power comes from two separate PV panels connected to the DC links through DC-DC converters to draw the maximum power. Due to boost operation of this inverter, two different PV panels can combine and send their powers to the grid. Simulations and experimental tests are conducted to investigate the good dynamic performance of the inverter in grid-connected PV system.

KEYWORDS:

1.      PV Inverter

2.      Pack U-Cell

3.      Modified Pack U-Cell

4.      PUC5

5.      MPUC5

6.      Power Quality

7.      Renewable Energy Conversion

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 In this paper a modified multilevel inverter topology has been presented. The proposed MPUC inverter can generate 7-level voltage waveform at the output with low harmonic contents. Unlike the reported PUC topology, the 7-level MPUC inverter is capable to produce voltage levels more than the DC sources used in the structure. It can sum up the DC buses amplitudes to deliver more power to the output. The associated switching algorithm has been designed and implemented on the introduced MPUC topology with reduced switching frequency aspect. Moreover, photovoltaic application has been targeted for this inverter to deliver power from PV panels with different voltage/current rating to grid. In this regard, results have been shown to validate the acceptable voltage regulation and current controlling of the grid-connected inverter as well as the implemented P&O MPPT algorithm.

REFERENCES:

[1] B. Singh, A. Chandra, and K. Al-Haddad, Power Quality: Problems and Mitigation Techniques: John Wiley & Sons, 2014.

[2] I. Gowaid, G. Adam, A. Massoud, S. Ahmed, and B. Williams, "Hybrid and Modular Multilevel Converter Designs for Isolated HVDC-DC Converters," IEEE Journal Emerg. and Select. Topics in Power Electron., vol. PP, no. 99, p. 1, 2017.

[3] H. Vahedi, K. Al-Haddad, Y. Ounejjar, and K. Addoweesh, "Crossover Switches Cell (CSC): A New Multilevel Inverter Topology with Maximum Voltage Levels and Minimum DC Sources," in IECON 2013-39th Annual Conference on IEEE Industrial Electronics Society, Austria, 2013, pp. 54-59.

[4] P. W. Hammond, "A new approach to enhance power quality for medium voltage drives," in Petroleum and Chemical Industry Conference, 1995. Record of Conference Papers., Industry Applications Society 42nd Annual, 1995, pp. 231-235.

[5] A. Nabae, I. Takahashi, and H. Akagi, "A new neutral-point-clamped PWM inverter," IEEE Trans. Ind. Applications, no. 5, pp. 518-523, 1981.

Finite Control Set Model Predictive Control for Grid Connected Packed U Cells Multilevel Inverter

 ABSTRACT:

This paper presents a Finite Control Set Model Predictive Control (FCS-MPC) for grid-tied Packed U Cells (PUC) Multilevel Inverter (MLI). The system under study consists of a single-phase 3-cells PUC inverter connected to the grid through filtering inductor. The proposed competitive topology allows the generation of 7-level output voltage with reduction of passive and active components compared to the conventional multilevel inverters. The aim of the proposed FCS-MPC technique is to achieve, under various operating conditions, grid-tie current injection with unity power factor and low Total Harmonic Distortion (THD) while balancing the capacitor voltage. Parameters sensitivity analysis was also conducted. The study is conducted on a low power case study single-phase 3-cells PUC inverter and with possible extension to higher number of cells. Theoretical analysis, simulation, and experimental results are presented and compared.

KEYWORDS:

1.      Grid Connection

2.      Model Predictive Control

3.      Packed U Cells Inverter

4.      PUC

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

This paper presented the design, simulations, and experimental validation of a FCS-MPC technique that properly deals with the complex nature of the PUC. Digital simulation for a grid-connected 7-level single-phase PUC inverter was carried out. The simulation results showed that the proposed MPC is capable of simultaneously controlling multi variables of the PUC inverter. The tuning of the weighting factor was conducted successfully based on minimizing the grid current THD as well as the capacitor voltage error. Using the properly selected weighting factor, the MPC has shown an efficient and stable tracking of the reference current at steady state and fast transient response. It is also capable of maintaining the capacitor voltage at its pre-selected and desired level. Parameters sensitivity analysis was carried out and showed that the parameters variation does not have a significant effect on the controller performance. The obtained experimental results confirmed the simulation results and demonstrated that the proposed MPC is effective in controlling the grid current with high steady-state and dynamic tracking performances while keeping balanced capacitor voltage.

 REFERENCES:

[1] H. Abu-Rub, M. Malinowski, K. Al-Haddad, “Power Electronics for Renewable Energy Systems, Transportation and Industrial Applications”, John Wiley & Sons, 2014.

[2] E. Babaei, S. Alilu and S. Laali, "A New General Topology for Cascaded Multilevel Inverters With Reduced Number of Components Based on Developed H-Bridge," in IEEE Trans. Ind. Electron., vol. 61, no. 8, pp. 3932-3939, Aug. 2014.

[3] J. Rodríguez, J.S. Lai, F.Z. Peng, “Multilevel Inverters: A Survey of Topologies, Controls, and Applications”, IEEE Trans. Ind. Electron., vol. 49, no. 4, August 2002.

[4] H. Abu-Rub, J. Holtz, J. Rodriguez and G. Baoming, "Medium-Voltage Multilevel Converters—State of the Art, Challenges, and Requirements in Industrial Applications," IEEE Trans. Ind. Electron., vol.57, no.8, pp.2581-2596, 2010.

[5] J. Chavarria, D. Biel, F. Guinjoan, C. Meza and J. J. Negroni, "Energy-Balance Control of PV Cascaded Multilevel Grid-Connected Inverters Under Level-Shifted and Phase-Shifted PWMs," IEEE Trans. Ind. Electron., vol.60, no.1, pp.98-111, Jan. 2013.

Development of an enhanced multilevel converter using an efficient fundamental switching technique

 ABSTRACT:

This paper presents a new 1-ϕ multilevel inverter topology, which requires a reduced number of switching components, leading to a reduction in the overall expenditure, and enhances reliability for 1-ϕ applications. Without employing any additional H-bridge circuit, the proposed topology can generate both positive and negative polarity output with reduced switching losses and voltage stress. A detailed comparison with some of the prominent multilevel inverters has been presented, which indicates the superiority of the proposed inverter in terms of its design. In addition, to mitigate the harmonics content in the output response, the fundamental sine quantized switching technique has been incorporated into the proposed configuration. The operation and performance of the proposed multilevel inverter have been ascertained by MATLAB/SIMULINK simulation. Finally, a 21-level experimental prototype has been developed to validate theoretical analysis and exhibit the merits of the proposed topology.

KEYWORDS:

1.      Fundamental sine quantized switching technique (FSQST)

2.      Multilevel inverter (MLI)

3.      Total harmonics distortion (THD)

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

 In this work a new modified MLI topology has been proposed with voltage rating of the individual power MOSFETs less than the actual output voltage rating. Also the total number of the semiconductor switches and DC supplies requirement is less. Similarly, it can be inferred that by implementing the FSQST switching technique in the proposed topology, it provides better harmonics profile in the output response while keeping the switching loss minimum. Thus, the proposed inverter is more economic as well as exhibits higher overall efficiency. So, this proposed topology can be used for medium and high power applications.

REFERENCES:

[1] Saccol GA, Giacomini JC, Batschauer AL, Rech C. Comprehensive analysis of singlephase full-bridge asymmetrical flying capacitor inverters. IEEE Trans Ind Appl 2019;55(2):1775–86. https://doi.org/10.1109/TIA.2018.2883549.

[2] Amamra S, Meghriche K, Cherifi A, Francois B. Multilevel inverter topology for renewable energy grid integration. IEEE Trans Industr Electron 2017;64(11):8855–66. https://doi.org/10.1109/TIE.2016.2645887.

[3] Das MK, Jana KC, Sinha A. Performance evaluation of an asymmetrical reduced switched multi-level inverter for a grid-connected pv system. IET Renew Power Gener 2018;12(2):252–63. https://doi.org/10.1049/iet-rpg.2016.0895.

[4] Yang S, Liu Y, Wang X, Gunasekaran D, Karki U, Peng FZ. Modulation and control of transformerless upfc. IEEE Trans Power Electron 2016;31(2):1050–63. https://doi. org/10.1109/TPEL.2015.2416331.

[5] Quraan M, Tricoli P, D’Arco S, Piegari L. Efficiency assessment of modular multilevel converters for battery electric vehicles. IEEE Trans Power Electron 2017;32(3):2041–51. https://doi.org/10.1109/TPEL.2016.2557579.