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Tuesday, 8 December 2015

Comprehensive Approach to Modeling and Simulation of Photovoltaic Arrays


ABSTRACT:

This paper proposes a method of modeling and simulation of photovoltaic arrays. The main objective is to find the parameters of the nonlinear I–V equation by adjusting the curve at three points: open circuit, maximum power, and short circuit. Given these three points, which are provided by all commercial array datasheets, the method finds the best I–V equation for the single-diode photovoltaic (PV) model including the effect of the series and parallel resistances, and warranties that the maximum power of the model matches with the maximum power of the real array. With the parameters of the adjusted I–V equation, one can build a PV circuit model with any circuit simulator by using basic math blocks. The modeling method and the proposed circuit model are useful for power electronics designers who need a simple, fast, accurate, and easy-to-use modeling method for using in simulations of PV systems. In the first pages, the reader will find a tutorial on PV devices and will understand the parameters that compose the single-diode PV model. The modeling method is then introduced and presented in details. The model is validated with experimental data of commercial PV arrays.

KEYWORDS:
1.      Array
2.       Circuit
3.       Equivalent
4.       Model
5.      Modeling
6.      Photovoltaic (PV)
7.       Simulation.

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:
                    




Fig. 1. PV array model circuit with a controlled current source, equivalent resistors, and the equation of the model current (Im ).

EXPECTED SIMULATION RESULTS:

                  


Fig. 2. P V curves plotted for different values of Rs and Rp .



                     

Fig. 3. Pmax,m versus V for several values of Rs > 0.




                                    


Fig. 4. IV curves plotted for different values of Rs and Rp .


                                  
                          


Fig. 5. Pmax = f (Rs ) with I = Imp and V = Vmp.

        
                   

Fig. 6. IV curve adjusted to three remarkable points.

                        


Fig. 7. P V curve adjusted to three remarkable points.

                      



Fig. 8. IV model curves and experimental data of theKC200GT solar array at different temperatures, 1000 W/m2 .
        
                 

Fig. 9. IV model curves and experimental data of theKC200GT solar array at different irradiations, 250C.

CONCLUSION:

This paper has analyzed the development of a method for the mathematical modeling of PV arrays. The objective of the method is to fit the mathematical IV equation to the experimental remarkable points of the IV curve of the practical array. The method obtains the parameters of the IV equation by using the following nominal information from the array datasheet: open circuit voltage, short-circuit current, maximum output power, voltage and current at the MPP, and current/temperature and voltage/temperature coefficients. This paper has proposed an effective and straightforward method to fit the mathematical IV curve to the three (V, I) remarkable points without the need to guess or to estimate any other parameters except the diode constant a. This paper has proposed a closed solution for the problem of finding the parameters of the single-diode model equation of a practical PV array. Other authors have tried to propose single-diode models and methods for estimating the model parameters, but these methods always require visually fitting the mathematical curve to the IV points and/or graphically extracting the slope of the IV curve at a given point and/or successively solving and adjusting the model in a trial and error process. Some authors have proposed indirect methods to adjust the IV curve through artificial intelligence and interpolation techniques . Although interesting, such methods are not very practical and are unnecessarily complicated and require more computational effort than it would be expected for this problem. Moreover, frequently in these models Rs and Rp are neglected or treated as independent parameters, which is not true if one wishes to correctly adjust the model so that the maximum power of the model is equal to the maximum power of the practical array. An equation to express the dependence of the diode saturation current I0 on the temperature was proposed and used in the model. The results obtained in the modeling of two practical PV arrays have demonstrated that the equation is effective and permits to exactly adjust the IV curve at the open-circuit voltages at temperatures different from the nominal. Moreover, the assumption Ipv ≈ Isc used in most of previous works on PV modeling was replaced in this method by a relation between Ipv and Isc based on the series and parallel resistances. The proposed iterative method for solving the unknown parameters of the IV equation allows to determine the value of Ipv , which is different from Isc . This paper has presented in detail the equations that constitute the single-diode PV IV model and the algorithm necessary to obtain the parameters of the equation. In order to show the practical use of the proposed modeling method, this paper has presented two circuit models that can be used to simulate PV arrays with circuit simulators. This paper provides the reader with all necessary information to easily develop a single-diode PV array model for analyzing and simulating a PV array. Programs and ready-to-use circuit models are available for download at: http://sites.google.com/site/mvillalva/pvmodel.

REFERENCES:

[1] A. S. Sedra and K. C. Smith, Microelectronic Circuits. London, U.K.: Oxford Univ. Press, 2006.
[2] H. J. M¨oller, Semiconductors for Solar Cells. Norwood, MA: Artech House, 1993.
[3] A. L. Fahrenbruch and R. H. Bube, Fundamentals of Solar Cells. San Francisco, CA: Academic, 1983.
[4] F. Lasnier and T. G. Ang, Photovoltaic Engineering Handbook. New York: Adam Hilger, 1990.

[5] “Photovoltaic systems technology,” Universit¨at Kassel, Kassel, Germany, 2003.

Saturday, 28 November 2015

A Five Level Inverter Topology with Single DC Supply by Cascading a Flying Capacitor Inverter and an H-Bridge



ABSTRACT:
In this paper, a new three-phase, five-level inverter topology with a single-dc source is presented. The proposed topology is obtained by cascading a three-level flying capacitor inverter with a flying H-bridge power cell in each phase. This topology has redundant switching states for generating different pole voltages. By selecting appropriate switching states, the capacitor voltages can be balanced instantaneously (as compared to the fundamental) in any direction of the current, irrespective of the load power factor. Another important feature of this topology is that if any H-bridge fails, it can be bypassed and the configuration can still operate as a three-level inverter at its full power rating. This feature improves the reliability of the circuit. A 3-kW induction motor is run with the proposed topology for the full modulation range. The effectiveness of the capacitor balancing algorithm is tested for the full range of speed and during the sudden acceleration of the motor.

KEYWORDS:
1.      Flying capacitor (FC)
2.       H-bridge
3.       Induction motor drive
4.       Multilevel inverter

SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:



 Fig 1 Proposed three- phase power circuit formed by the connection of a three phase flying capacitor inverter with H-bridge in series


 EXPECTED SIMULATION RESULTS:



 Fig. 2. Phase voltage VAN , phase current IA and capacitor voltage ripple for different modulation indexes for phase A: VC 1 = 5 V/div; VC 2 = 10 V/div; IA = 2 A/div. (a) 10 Hz with modulation index of 0.2 (VA N = 50 V/div, time = 20 ms/div). (b) 20 Hz with modulation index of 0.4 (VAN = 100 V/div, time =10 ms/div). (c) 30 Hz with modulation  index  of  0.6  (VAN  = 100 V/div, time = 10 ms/div). (d) 40 Hz with modulation index of 0.8 (VA N = 100 V/div, time = 5 ms/div).


Fig. 3. Pole voltage VAO , phase current IA and capacitor voltage ripple for different modulation indexes for phase A: VC 1 = 5 V/div; VC 2 = 10 V/div; IA = 2 A/div. (a) 10 Hz with modulation index of 0.2 (VAO = 50 V/div, time = 20 ms/div). (b) 20 Hz with modulation index of 0.4 (VAO = 100 V/div, time = 10 ms/div). (c) 30 Hz with modulation index of 0.6 (VAO = 100 V/div, and time = 10 ms/div). (d) 40 Hz with modulation index of 0.8 (VAO = 100 V/div, time = 5 ms/div).

       

 Fig. 4. Rapid acceleration of motor from 10 to 40 Hz in 5.5 s. Capacitor voltage remains constant. VAN (phase voltage): 200 V/div, IA (phase current): 2 A/div, VC 1 (VD C /2 capacitor DC voltage): 100 V/div, VC 2 (VD C /4 capacitor DC voltage): 100 V/div, and time scale: 1 s/div.


      Fig. 5.  Capacitor balancing operation. The balancing logic has been disabled at T1. C1 balancing has been enabled at T2 and C2 balancing has been en- abled at T3. VAN (phase voltage): 200 V/div, I(phase current): 2 A/div, VC 1(VD C /2 capacitor DC voltage): 100 V/div, VC 2 (VD C /4 capacitor DC voltage): 100 V/div, and time scale: 2 s/div.

CONCLUSION:

In this paper, a new three-phase f ve-level inverter topology with a single-dc source has been proposed. This configuration is formed by cascading a three-level FC inverter and capacitor-fed H-bridges. The key advantages of this topology compared to the conventional topologies include reduced number of devices and simple control. An important feature of this inverter is the ability to balance the capacitor voltages irrespective of load power factor. Another advantage of this inverter is that if one of the H-bridge fails, it can operate as a three-level inverter at full power rating by bypassing the H-bridge. This feature of the inverter improves the reliability of the system The proposed configuration has been analyzed and experimentally verifie for various modulation indexes and frequencies by running a 3-kW squirrel cage induction motor in V/f  control mode, at no load. The working of the capacitor balancing algorithm has been tested. The stable operation of the inverter for various modulation indexes and stability of the inverter voltage levels during rapid acceleration have been validated  experimentally


REFERENCES:
[1] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, M.A.M.  Prats,  “The  age  of multilevel  converters  arrives,”  IEEE  Ind.  Electron.  Magazine, vol. 2, no. 2, pp. 28–39, June.2008.
[2] S.  Kouro,  M.  Malinowski,  K.  Gopakumar,  J.  Pou,  L.  G.  Franquelo,  B.Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, “Recent Advances and  Industrial  Applications  of  Multilevel  Converters,”  IEEE  Trans.  Ind.  Electron.,vol. 57, no. 8, pp. 2553–2580, Aug. 2010.
[3] A. Nabae,  I.  Takahashi,  and H. Akagi,  “A  new  neutral-point-clamped  PWM inverter,” IEEE Trans. Ind. Appl., vol. IA-17, no. 5, pp. 518–523,  Sep. 1981. 
[4] M. Marchesoni, M. Mazzucchelli, and S. Tenconi, “A non-conventional  power  converter  for  plasma  stabilization,”  in  Proc.  IEEE  19th  Annu.  Power  Electron.  Spec. Conf.  (PESC’88) Rec., Apr.  11–14,  vol.  1,  pp.  122–129.
[5] Z.  Du,  L.M.  Tolbert,  J.  N.  Chiasson,  B.  Ozpineci,  H.  Li,  and  A.  Q.  Huang,  “Hybrid  cascaded H-bridges multilevel motor drive  control  for  electric vehicles,” in Proc. IEEE 37th Power Electron. Spec. Conf., Jun.  18–22, 2006, pp. 1–6.




A Three Level Common Mode Voltage Eliminated Inverter with Single Dc Supply Using Flying Capacitor Inverter and Cascaded H-Bridge



ABSTRACT:

A three-level common-mode voltage eliminated inverter with single dc supply using flying capacitor inverter and cascaded H-bridge has been proposed in this paper. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H-bridge fails, the system can still be operated as a normal three-level inverter at full power. This inverter has many other advantages like use of single dc supply, making it possible for a back-to-back grid-tied converter application, improved reliability, etc.

KEYWORDS:

1.      Common-mode voltage elimination
2.       Hybrid multilevel inverter
3.       Multilevel inverter
4.       Three-level inverter

 SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:



Fig 1 Power circuit for the proposed three level common mode voltage eliminated inverter

EXPECTED SIMULATION RESULTS:



Fig. 2. Simulation result for testing the capacitor balancing algorithm. VAO : pole voltage (100 V/div), IA : pole current (5  A/div)  VC 1 :  cap1-voltage (100 V/div), VC 2 : cap2 voltage (50 V/div), VC M : common-mode voltage (50 V/div), time: 500 ms/div.



Fig. 3. Steady-state performance at 10 Hz. VAO : pole voltage (100 V/div),  VA N : phase voltage (100 V/div), VN O : neutral point voltage (20 V/div), IA : phase current (2 A/div), time: 20 ms/div.

Fig. 4. Steady-state performance at 20 Hz. VAO : pole voltage (100 V/div), VA N : phase voltage (100 V/div), VN O : neutral point voltage (20 V/div), IA : phase current (2 A/div), time: 10 ms/div.



Fig. 5. Steady-state performance at 30 Hz. VAO : pole voltage (100 V/div), VA N : phase voltage (100 V/div), VN O : neutral point voltage (20 V/div), IA : phase current (2 A/div), time: 10 ms/div.

Fig. 6. Steady-state performance at 40 Hz. VAO : pole voltage (100 V/div), VA N : phase voltage (100 V/div), VN O : neutral point voltage (20 V/div), IA : phase current (2 A/div).
 CONCLUSION:

In this paper, a three-level common-mode voltage eliminated inverter with single dc supply using flyin capacitor inverter and cascaded H-bridge was proposed and studied. The operation and performance of the proposed inverter  is simulated  in Simulink with induction motor load. Various aspects of the inverter configuration such as the transients and the performance of the capacitor balancing algorithm, have been studied. The proposed inverter is implemented in hardware using IGBT- based inverters. A three-phase Y-connected induction motor is run with the proposed inverter and the performance of the drive is analyzed for both steady-state operation and transient operation during sudden acceleration. In all the cases, the inverter was able to give faithful reproduction of intended voltage levels with negligible capacitor voltage ripple and common mode, thereby improving the life of bearings. This configuration has various advantages like motor being connected in single-ended configuration use of reduced number of switches, use of single dc supply, etc. Also, this configuration has improved reliability.In case of failure of one of the devices in the H-bridge, the inverter can still be operated as a normal three-level inverter  at full power or a two-level common-mode voltage eliminated inverter at full power rating by bypassing the H-bridges, thereby improving the overall reliability of the system greatly.
REFERENCES:

[1] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, M.A.M.  Prats,  “The  age  of multilevel  converters  arrives,”  IEEE  Ind.  Electron.  Magazine, vol. 2, no. 2, pp. 28–39, June.2008.
[2] S.  Kouro,  M.  Malinowski,  K.  Gopakumar,  J.  Pou,  L.  G.  Franquelo,  B.Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, “Recent Advances and  Industrial  Applications  of  Multilevel  Converters,”  IEEE  Trans.  Ind.  Electron.,vol. 57, no. 8, pp. 2553–2580, Aug. 2010.
[3] A. Nabae,  I.  Takahashi,  and H. Akagi,  “A  new  neutral-point-clamped  PWM inverter,” IEEE Trans. Ind. Appl., vol. IA-17, no. 5, pp. 518–523,  Sep. 1981. 
[4] M. Marchesoni, M. Mazzucchelli, and S. Tenconi, “A non-conventional  power  converter  for  plasma  stabilization,”  in  Proc.  IEEE  19th  Annu.  Power  Electron.  Spec. Conf.  (PESC’88) Rec., Apr.  11–14,  vol.  1,  pp.  122–129.
[5] Z.  Du,  L.M.  Tolbert,  J.  N.  Chiasson,  B.  Ozpineci,  H.  Li,  and  A.  Q.  Huang,  “Hybrid  cascaded H-bridges multilevel motor drive  control  for  electric vehicles,” in Proc. IEEE 37th Power Electron. Spec. Conf., Jun.  18–22, 2006, pp. 1–6.