A Five Level Inverter Topology with Single DC Supply by Cascading a Flying Capacitor Inverter and an H-Bridge

ABSTRACT:

In this paper, a new three-phase, five-level inverter topology with a single-dc source is presented. The proposed topology is obtained by cascading a three-level flying capacitor inverter with a flying H-bridge power cell in each phase. This topology has redundant switching states for generating different pole voltages. By selecting appropriate switching states, the capacitor voltages can be balanced instantaneously (as compared to the fundamental) in any direction of the current, irrespective of the load power factor. Another important feature of this topology is that if any H-bridge fails, it can be bypassed and the configuration can still operate as a three-level inverter at its full power rating. This feature improves the reliability of the circuit. A 3-kW induction motor is run with the proposed topology for the full modulation range. The effectiveness of the capacitor balancing algorithm is tested for the full range of speed and during the sudden acceleration of the motor.

KEYWORDS:

1.      Flying capacitor (FC)

2.       H-bridge

3.       Induction motor drive

4.       Multilevel inverter

SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

 Fig 1 Proposed three- phase power circuit formed by the connection of a three phase flying capacitor inverter with H-bridge in series

 EXPECTED SIMULATION RESULTS:

 Fig. 2. Phase voltage V_AN , phase current IA and capacitor voltage ripple for different modulation indexes for phase A: ∆VC 1 = 5 V/div; ∆VC 2 = 10 V/div; IA = 2 A/div. (a) 10 Hz with modulation index of 0.2 (V_{A N} = 50 V/div, time = 20 ms/div). (b) 20 Hz with modulation index of 0.4 (V_AN = 100 V/div, time =10 ms/div). (c) 30 Hz with modulation  index  of  0.6  (V_AN  = 100 V/div, time = 10 ms/div). (d) 40 Hz with modulation index of 0.8 (V_{A N} = 100 V/div, time = 5 ms/div).

Fig. 3. Pole voltage V_AO , phase current IA and capacitor voltage ripple for different modulation indexes for phase A: ∆VC 1 = 5 V/div; ∆VC 2 = 10 V/div; IA = 2 A/div. (a) 10 Hz with modulation index of 0.2 (V_AO = 50 V/div, time = 20 ms/div). (b) 20 Hz with modulation index of 0.4 (V_AO = 100 V/div, time = 10 ms/div). (c) 30 Hz with modulation index of 0.6 (V_AO = 100 V/div, and time = 10 ms/div). (d) 40 Hz with modulation index of 0.8 (V_AO = 100 V/div, time = 5 ms/div).

       

 Fig. 4. Rapid acceleration of motor from 10 to 40 Hz in 5.5 s. Capacitor voltage remains constant. V_AN (phase voltage): 200 V/div, IA (phase current): 2 A/div, VC 1 (VD C /2 capacitor DC voltage): 100 V/div, VC 2 (VD C /4 capacitor DC voltage): 100 V/div, and time scale: 1 s/div.

      Fig. 5.  Capacitor balancing operation. The balancing logic has been disabled at T1. C1 balancing has been enabled at T2 and C2 balancing has been en- abled at T3. V_AN (phase voltage): 200 V/div, IA  (phase current): 2 A/div, VC 1(VD C /2 capacitor DC voltage): 100 V/div, VC 2 (VD C /4 capacitor DC voltage): 100 V/div, and time scale: 2 s/div.

CONCLUSION:

In this paper, a new three-phase f ve-level inverter topology with a single-dc source has been proposed. This configuration is formed by cascading a three-level FC inverter and capacitor-fed H-bridges. The key advantages of this topology compared to the conventional topologies include reduced number of devices and simple control. An important feature of this inverter is the ability to balance the capacitor voltages irrespective of load power factor. Another advantage of this inverter is that if one of the H-bridge fails, it can operate as a three-level inverter at full power rating by bypassing the H-bridge. This feature of the inverter improves the reliability of the system The proposed configuration has been analyzed and experimentally verifie for various modulation indexes and frequencies by running a 3-kW squirrel cage induction motor in V/f  control mode, at no load. The working of the capacitor balancing algorithm has been tested. The stable operation of the inverter for various modulation indexes and stability of the inverter voltage levels during rapid acceleration have been validated  experimentally

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