ABSTRACT:
This
paper presents a utilization technique for enhancing the capabilities of
dynamic voltage restorers (DVRs). This study aims to enhance the abilities of
DVRs to maintain acceptable voltages and last longer during compensation. Both
the magnitude and phase displacement angle of the synthesized DVR voltage are
precisely adjusted to achieve lower power utilization. The real and reactive
powers are calculated in real time in the tracking loop to achieve better
conditions. This technique results in less energy being taken out of the
DC-link capacitor, resulting in smaller size requirements. The results from
both the simulation and experimental tests illustrate that the proposed
technique clearly achieved superior performance. The DVR’s active action period
was considerably longer, with nearly 5 times the energy left in the DC-link
capacitor for further compensation compared to the traditional technique. This
technical merit demonstrates that DVRs could cover a wider range of voltage
sags; the practicality of this idea for better utilization is better than that
of existing installed DVRs.
KEYWORDS:
1. DVR capability
2. Energy optimized
3. Energy source
4. Series compensator
5. Voltage stability
SOFTWARE: MATLAB/SIMULINK
CIRCUIT DIAGRAM:
Fig. 1. Circuit diagram model for
simulation using MatLab/Simulink.
Fig.
2. D-axis voltages at the system (VSd), DVR (VDVRd), and load (VLd). during
in-phase compensation (simulation).
Fig.
3. Q-axis voltages at the system (VSq), DVR (VDVRq), and load (VLq) during
in-phase compensation
(simulation).
Fig.
4. The overall three-phase voltage signals during in-phase compensation
(simulation).
Fig.
5. Real power at source (PS), the DVR (PDVR) and load (PL) during in-phase
compensation (simulation).
Fig.
6. The DVR DC-side voltage (VDC) during in-phase compensation (simulation).
Fig.
7. D-axis voltages at the system(VSd), DVR (VDVRd), and load (VLd) during
zero-real power tracking compensation (simulation).
Fig.
8. Q-axis voltages at the system (VSq), DVR (VDVRq), and load (VLq) during
zero-real power tracking compensation (simulation)..
Fig.
9. The overall three-phase voltage signals during zero-real power tracking
compensation (simulation).
Fig.
10. The DVR DC-side voltage (VDC) during zero-real power tracking compensation
(simulation).
CONCLUSION:
It
is clear from both the simulation and experimental results illustrated in this
paper that the proposed zero-real power tracking technique applied to DVR-based
compensation can result in superior performance compared to the traditional
in-phase technique. The experimental test results match those proposed using
simulation, although some discrepancies due to the imperfect nature of the test
circuit components were seen.
With
the traditional in-phase technique, the compensation was performed and depended
on the real power injected to the system. Then, more of the energy stored in
the DC-link capacitor was utilized quickly, reaching its limitation within a
shorter period. The compensation was eventually forced to stop before the
entire voltage sag period was finished. When the compensation was conducted
using the proposed technique, less energy was used for the converter basic
switching process. The clear advantage in terms of the voltage level at the
DC-link capacitor indicates that with the proposed technique, more energy
remains in the DVR (67% to 14% in the traditional in-phase technique), which
guarantees the correct compensating voltage will be provided for longer periods
of compensation. With this technique, none (or less) of the real power will be
transferred to the system, which provides more for the DVR to cover a wider
range of voltage sags, adding more flexible adaptive control to the solution of
sag voltage disturbances.
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