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Sunday, 13 December 2020

Single Phase 21 Level Asymmetric Cascaded Multilevel Inverter With Reduced Number Of Switches And Dc Sources

ABSTRACT:  

Multilevel inverter technology has emerged as a very important alternative in the field of medium and high power industrial drive applications. The emergence of multilevel inverters has been increasing since three decades. These new types of converters are suitable for high voltage and high power application due to their ability to synthesize waveforms with better harmonic spectrum. Several multilevel converter topologies have been developed; i) diode clamped, ii) flying capacitors, and iii) cascaded or H-bridge. Cascade Multilevel Inverter (CMI) is one of the productive topology from multilevel family. By increasing the number of output voltage levels in multilevel inverter the Total Harmonic Distortion (THD) can be minimized. This project proposes a new topology of 21 level asymmetric cascaded multilevel inverter with 11 unidirectional switches and 3 diodes and 4 DC voltages sources. Several Pulse Width Modulation techniques are available, among them Level shifting SPWM techniques such as PO, POD and Space Vector PWM are used and comparison is shown on the basis of THDs obtained. MATLAB/ SIMULINK software is used for simulation

 

SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:



Fig.1. Basic Block Diagram of Proposed Multilevel Inverter

CIRCUIT DIAGRAM:

Fig. 2. Proposed topology



EXPERIMENTAL RESULTS:




Fig.3. Simulation result of 21 level multilevel inverter using PD PWM     



                                      Fig. 4. Simulation result of 21 level multilevel inverter using POD PWM

 

  




Fig. 5. Simulation result of 21 level multilevel inverter   using SVPWM                                                                               

                                                                                    


                      

Fig. .6. Simulation result of Pulses of   Switches in PD PWM

 


Fig. 7.. Simulation result of Pulses of Switches in POD PWM

CONCLUSION:

In this project, a new topology for 21 levels is proposed with reduced number of switches and DC sources. The Proposed circuit is validated on MATLAB/Simulink platform. The simulation of the 21 level asymmetric cascaded multilevel inverter is successfully done using Space vector, Phase disposition and Phase Opposition disposition pulse width modulation techniques. Thus, this new circuit will require lesser hardware space, lesser cost; also the complexity of the circuit will reduce. From the FFT analysis, it is found that PD PWM and POD PWM techniques give least THD. It is observed that even after the reduction in switches and sources, the desired output is obtained.

 

REFERENCES:

[1]             Jannu Ramu, S.J.V. Prakash, K. Satya Srinivasu, R.N.D. Pattabhi Ram, M. Vishnu Prasad and Md. Mazhar Hussain,” Comparison Between Symmetrical And Asymmetrical Single Phase Seven Level Cascade H-Bridge Multilevel Inverter With PWM Topology,” International Journal of Multidisciplinary Sciences and Engineering, Vol . 3, no. 4, April 2012.

[2]             R.Karthikeyan, Dr.S.Chenthur Pandian,” An Efficient Multilevel Inverter System For Reducing THD With Space Vector Modulation,” International Journal of Computer Applications (0975 – 8887),Volume 23– No.2, June 2011.

[3]             Xiaodong Yang, Chonglin Wang, Liping Shi ,Zhenglong Xia,” Generalized Space Vector Pulse Width Modulation Technique For Cascaded Multilevel Inverters,” International Journal of Control and Automation, Vol.7, No.1 (2014), pp.11-26

[4]             Balamurugan M.,Gnana Prakash M.,Umashankar S.,” A New Seven Level Symmetric Inverter With Reduced Number Of Switches And Dc Sources,” Advances in Electrical Engineering (ICAEE), 2014 International Conference.

[5]             Elyas Zamiri.,Sajjad Hamkari.,Ebrahim Babaei.,” A New Cascaded Multilevel Inverter Structure With Less Number Of Switches,” 5th Power Electronics, Drive systems and Technologies Conference, 2014 .

 

 

Design of a New Combined Cascaded Multilevel Inverter Based on Developed H-Bridge with Reduced Number of IGBTs and DC Voltage Sources

 ABSTRACT:  

In this paper, a new combined cascaded multilevel inverter with reduced number of switches and DC voltage sources which is formed by series connection of same units with developed H-Bridge is proposed. For the purpose of generating all even and odd voltage levels 5 algorithms to determine the magnitudes of DC voltage sources is proposed. In order to investigate the advantages and disadvantages of the proposed combined cascaded multilevel inverter the proposed algorithms are compared to presented topologies from different points of view. The experimental results of the proposed topology are stated to check and verifying the performance of the proposed topology.

 

KEYWORDS:

1.      Multilevel inverter

2.      Cascaded multilevel inverter

3.      Combined topology

4.      Developed H-Bridge

 

SOFTWARE: MATLAB/SIMULINK

 

 CIRCUIT DIAGRAM:


                                               Fig. 1. Topology of proposed combined cascaded multilevel inverter.

 EXPERIMENTAL RESULTS:

 

 


(a)

 


(b)

 




(c)

 


(d)


(e)

 

(f)



 
(g)

 


(h)



(i)

Fig. 2. Experimental results; (a) output voltage; (b) output voltage and current; (c) generated voltage levels by right side; (d) generated voltage levels by left side; (e) generated voltage levels by L,1 u ; (f) voltage across R2,2 S ; (g)

voltage across 1 T ; (h) voltage across 3 T ; (i) voltage across a T .

 

CONCLUSION:

In this paper, a new combined cascaded multilevel inverter has been proposed. After that, five different algorithms are proposed in order to determine the magnitudes of the DC voltage sources. By comparing these algorithms, it was concluded that the algorithm which generates a high number of voltage levels with less number of switches and DC voltage sources is better than other algorithms. According to this comparison, it was found that the fifth proposed algorithm is better among the proposed algorithms. In order to prove the claim about reduction of the number of IGBTs and DC voltage sources in the proposed topology, this topology was compared to presented topologies from different aspects. In these comparisons, it was found that the proposed topology generates 31 voltage levels with 14 IGBTs while presented topologies in [4], [10] and [12] generate the same number of voltage levels with 32, 16 and 34 IGBTs, respectively. Also, it was found that this number of voltage levels needs 4 DC voltage sources, whereas, the topologies which presented in [4] and [12] generate 17 and 9 voltage levels with the same  number of DC voltage sources. Afterwards, correctness of performance of the proposed topology and relations have been verified through experimentation of the proposed topology with 2 input units in each side.

REFERENCES:

[1] C.I. Odeh, E.S. Obe, and O. Ojo,: “Topology for cascaded multilevel inverter,” IET Power Electron., vol. 9, no. 5, pp. 921-929, April 2016.

[2] E. Zamiri, N. Vosoughi, S.H. Hosseini, R. Barzegarkhoo, and M. Sabahi, “A new cascaded switched-capacitor multilevel inverter based on improved series–parallel conversion with less number of components,” IEEE Trans. Ind. Electron., vol. 63, no. 6, pp. 3582-3594, June 2016.

[3] N. Prabaharan and K. Palanisamy, “Analysis of cascaded H-bridge multilevel inverter configuration with double level circuit,” IET Power Electron., vol. 10, no. 9, pp. 1023-1033, July 2017.

[4] M.R. Banaei, M.R. Jannati Oskuee and H. Khounjahan, “Reconfiguration of semi-cascaded multilevel inverter to improve systems performance parameters,” IET Power Electron., vol. 7, no. 5, pp. 1106-1112, May 2014.

[5] E. Babaei, S. Laali, and Z. Bayat, “A single-phase cascaded multilevel inverter based on a new basic unit with reduced number of power switches,” IEEE Trans. Ind. Electron., vol. 62, no. 2, pp. 922-929, Feb. 2015.

Friday, 4 December 2020

Power quality enhancement in solar power with grid connected system using UPQC

 ABSTRACT:

 The need to generate pollution free energy has triggered the effect towards the usage of solar energy interconnection with the grid. Consequently, the Photovoltaic (PV) panel interfaced with the grid causes the power quality problems such as a voltage harmonics and voltage distortion etc., Active power filters are the powerful tool for mitigation of harmonics. This work involves the use of single-phase Unified Power Quality Conditioner (UPQC) based on a unit vector template control algorithm for its functions with grid integration of photovoltaic, such as voltage sags/ swell, unit power factor correction, voltage and current harmonic cancelation. The unit vector template control algorithm includes a phase-locked loop (PLL) mechanism that is responsible for avoiding multiple zero crossings during highly distorted grid voltage detection. A unit vector template control with a PLL-based control algorithm is applied to the shunt and series inverters of PV grid connected UPQC. In addition to normalizing voltage and current disturbances, the proposed controller has the functions of phase detection and perfect grid synchronization. It is proposed that the system performance is fully verified by MATLAB simulation with the response of load variation, transient response, THD, voltage swell and sag. The Total Harmonic Distortions (THDs) of proposed grid integration of photovoltaic systems through single-phase unified power quality conditioner (UPQC) obtain the range of IEEE standard.

 KEYWORDS:

1.      Maximum power point tracking

2.      Phase locked loop

3.      Photovoltaic

4.      Grid tie inverter

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:




Fig. 1. Proposed UPQC with Solar Grid Connected System.


EXPECTED SIMULATION RESULTS:

 



Fig. 2. Simulation result of PV.

 



Fig. 3. Output Voltage of Boost Converter.




Fig. 4. PV- Inverter Voltage Response.



Fig. 5. DC-Link Voltage of UPQC.




Fig. 6. Voltage Sag and swell compensation.


Fig. 7. Source current.



Fig. 8. THD response Without UPQC system.



Fig. 9. THD response of Proposed System


.


Fig. 10. Performance Comparison of MPPT.

CONCLUSION:

In this work presents, a single phase grid connected PV system. Although the system is designed to run smoothly on the unity power factor to enable efficient use of full inverter capacity, it runs on any desired power. Using the Perturb & Observe (P&O) algorithm to ensure MPPT performance, it can smoothly track changes in sunlight without oscillation. The simulation and test results show a very good match. The investigation will cover the MPPT technique, voltage control and current control of the system. The proposed unit vector template matching with UPQC gives the best results against all parameters, for example output of solar cell per unit is 0.94, steady state error 8%, and MPPT efficiency 96.56% and THD is 4.66%.In this study, UPQC developed a hysteresis controller based on a single phase UVTG approach and simulated three cases of voltage sag/swell, unity power factor correction, voltage and current synchronization. The Total Harmonic Distortions (THDs) of proposed grid integration of photovoltaic systemsalong with single-phase unified power quality conditioner (UPQC) obtain the range of IEEE standard because the THD is less than 5%.

Declaration of Competing Interest

The outcomes demonstrate that proposed unit vector template matching with UPQC gives the best results against all parameters, for example output of each solar cell per unit is 0.94, steady state error 8%, and MPPT efficiency 94.92% and THD is 4.66%. In this study, UPQC developed a hysteresis controller based on a single phase UVTG approach and simulated three cases of voltage sag/swell, unity power factor correction, voltage and current synchronization. Simulation results show satisfactory behavior in steady state, and dynamic conditions such as load variation in sunlight, voltage sags, swell and THD. The TotalHarmonic Distortions (THDs) of proposed grid integration of photovoltaic systems through single-phase unified power quality conditioner (UPQC) found within limits of the IEEE standard because the THD is less than 5%.

 REFERENCES:

[1] S. Kr. Tiwari, B. Singh, P.K. Goel, Design and control of micro-grid fed by renewable energy generating sources, IEEE Trans. Ind. Appl. (2018) 1, https://doi. org/10.1109/TIA.2018.2793213, 1.

[2] Z. Zaheeruddin, M. Manas, Renewable energy management through microgrid central controller design: an approach to integrate solar, wind and biomass with battery, Energy Rep. 1 (2015) 156–163, https://doi.org/10.1016/j. egyr.2015.06.003.

 [3] Y.V. Pavan Kumar, B. Ravikumar, Renewable energy based micro grid system sizing and energy management for green buildings, J. Mod. Power Syst. Clean Energy 3 (March 1) (2015) 1. -1.

 [4] G. Rizzo, Automotive applications of solar energy, IFAC Proceed. Vol. 43 (July 7) (2010) 174–185.

[5] R. OctaPratama, M. Effendy, Z. Has, Optimization maximum power point tracking (MPPT) using P&O-fuzzy and IC-fuzzy in photovoltaic, Kinetik 3 (2018), https:// doi.org/10.22219/kinetik.v3i2.200.

Friday, 20 November 2020

A New Space Vector Pulse Width Modulated Transformer Less Single-Phase Unified Power Quality Conditioner

 ABSTRACT:

 

Emergence of solid-state switching devices, like thyristors, GTO’s, IGBT’s and etc, are widely used for controlling electric power in power electronic equipment for various purpose such as HVDC systems, computers etc. These devices draw disturbance in voltages and currents of both source side and distribution ends due to its non-linearity. This induce harmonics, reactive power, and excess neutral current cause the system to have less efficiency and reduction in power factor. In this paper transformer less single-phase unified power quality conditioner has been implemented to reduce the voltage and current distortions. The operation and control of single-phase transformer less three leg Unified power quality conditioner is investigated with the implementation of a new pulse width modulation method for solving the coupling problem introduced by common leg switches.

KEYWORDS:

1.      TL-UPQC

2.      SVPWM

3.      Harmonics

4.      Total harmonic distortion

5.      DSTACOM

  D   DVR

 

SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:

 

 


                                                  Fig. 1. Block Diagram for Harmonic Reduction Using UPQC.

EXPECTED SIMULATION RESULTS:

 


                                                          Fig. 2. DC- link Voltage Waveforms.

 


Fig. 3. Source Current Waveforms.


Fig. 4. % THD of Source Side Current.

 CONCLUSION:

The custom power devices such as DVR helps in compensation of voltage unbalances and DTATCOM helps in the elimination of current harmonics that are entering the circuit due to the presence of a non-linear load at the consumer side. By using a unified power quality conditioner both the issues such as compensation of voltage unbalances and elimination of current harmonics can be minimized. The replacement of the series transformer with a series inductance helps to overcome the issues of cost and weight of the system. The working principle and implementation of practical two-level space vector modulation has been shown. The special switching sequence incorporated in space vector modulation tech technique used here minimizes the coupling issues that occur in the common leg operation.

REFERENCES:

[1] A. Bendre, D. Divan, W. Kranz, W. Brumsickle, Equipment failures caused by power quality disturbances, in: Proc. IEEE IAS Annual Meeting, 2004, pp. 482– 489.

[2] I. Hunter, Power quality issues-a distribution company perspective, Power Eng. J., 15 (2) (Apr. 2001) 75–80.

[3] B. Singh, K. Al-Haddad, A. Chandra, A review of active filters for power quality improvement, IEEE Trans. Ind. Electron., 46 (5) (Oct. 1999) 960–971.

[4] P. Curtis, The fundamentals of power quality and their associated problems, IEEE Press, Wiley, 2007.

[5] M. El-Habrouk, M.K. Darwish, P. Mehta, Active power filters: a review, IEE Proc., Electr. Power Appl. 147 (5) (2000) 403, https://doi.org/10.1049/ipepa: 20000522.