An Intelligent Fuzzy Sliding Mode Controller for aBLDC Motor

ABSTRACT:  

Brushless DC (BLDC) motors are one of the most widely used motors, not only because of their efficiency, and torque characteristics, but also because they have the advantages of being a direct current (DC) supplied, eliminating the disadvantages of using Brushes. BLDC motors have a very wide range of speed, so speed control is a very important issue for it. Sliding mode control (SMC) is one of the popular strategies to deal with uncertain control systems. The Fuzzy Sliding Mode Controller (FSMC) combines the intelligence of a fuzzy inference system with the sliding mode controller. In this paper, an intelligent Fuzzy Sliding Mode controller for the speed control of BLDC motor is proposed. The mathematical model of the BLDC motor is developed and it is used to examine the performance of this controller. Conventionally PI controllers are used for the speed control of the BLDC motor. When Fuzzy SMC is used for the speed control of BLDC motor, the peak overshoot is completely eliminated which is 3% with PI controller. Also the rise time is reduced from 23 ms to 4 ms and the settling time is reduced from 46 ms to 4 ms by applying FMSMC. This paper emphasizes on the effectiveness of speed control of BLDC motor with Fuzzy Sliding Mode Controller and its merit over conventional PI controller.

KEYWORDS:

1.      BLDC motors

2.      Sliding Mode Control

3.      Fuzzy Sliding Mode controller

4.      PI Controller

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig 1 Block diagram of BLDC speed control.

EXPECTED SIMULATION RESULTS:

Fig 2 Step response with Fuzzy SMC and Fuzzy PI and PI Controllers

Fig 3 Current in the three phases

CONCLUSION:

Fuzzy sliding mode controller for the speed control of BLDC motor is designed and its performance comparison with PI controller is carried out in this paper. Conventionally PI controllers are used for the speed control of BLDC motor and they give moderate performance under undisturbed conditions even though they are very simple to design and easy to implement. But their performance is poor under disturbed condition like sudden changes in reference speed and sudden change in load. The BLDC motor with PI controller shows large overshoot, high settling time and comparatively large  speed variation under loaded condition.

The Fuzzy Sliding Mode Controller combines the intelligence of fuzzy logic with the Sliding Mode technique. The peak overshoot is completely eliminated and the rise time and settling time are improved when Fuzzy SMC is applied for the speed control of BLDC motor. The fluctuation in speed of the motor under loaded condition is also reduced when fuzzy SMC is applied. Thus this controller becomes an ideal choice for applications where very precise and fine control is required.

REFERENCES:

[1] Neethu U., Jisha V. R., “Speed Control of Brushless DC Motor : A Comparative Study”, IEEE International Conference on Power  Electronics, Drives and Energy Systems, Vol. 8, No. 12, 16-19 December 2012, Bengaluru India.

[2] Chee W. Lu, “T orque Controller for Brushless DC Motors”, IEEE Transactions on Industrial Electronics, Vol. 46, No. 2, April 1999.

[3] Tony Mathew, Caroline Ann Sam, ”Closed Loop Control of BLDC Motor Using a Fuzzy Logic Controller and Single Current Sensor”, International Conference on Advanced Computing and Communication Systems (ICACCS), Vol. 2, No. 13, 19-21 December 2013, Coimbatore India.

[4] T . Raghu, S. Chandra Sekhar, J. Srinivas Rao,“SEPIC Converter based – Drive for Unipolar BLDC Motor”, International Journal of Electrical  and Computer Engineering (IJECE), Vol.2, No.2, April 2012, pp. 159- 165.

[5] M. A. Jabbar, Hla Nu Phyu, Zhejie Liu, Chao Bi, “Modelling and Numerical Simulation of a Brushless Permanent – Magnet DC Motor in Dynamic Conditions by Time – Stepping T echnique”, IEEE Transactions on Industry Applications, Vol. 40, no. 3, MAY/JUNE 2004.

Power Quality Analysis of a PV fed Seven Level Cascaded H-Bridge Multilevel Inverter

ABSTRACT:  

Efficient DC to DC and DC to AC converters play a vital role in the reliable performance of standalone and grid connected photovoltaic systems. This paper deals with DC to AC conversion by a seven level cascaded H-bridge multilevel inverter for a standalone photovoltaic system. The PV fed seven level cascaded H-bridge multilevel inverter is analyzed in two ways: 1) with equal voltage sources as input to the H bridges and 2) with unequal voltage sources as input. A comparative study of the total harmonic distortion reduction in the PV fed multilevel inverter system with and without equal voltage sources as input is carried out. It is observed that with unequal voltage sources, the total harmonic distortion is increased than that with equal voltage sources as input to the PV fed seven level cascaded H-bridge multilevel inverter. Further, the study attempts to show that with an LC filter at the output stage of the multilevel inverter, the total harmonic reduction is significantly reduced and the power quality of the PV fed multilevel inverter system is highly improved. Results are verified using simulations done in MATLAB/Simulink environment.

KEYWORDS:

1.      Photo voltaic Array (PV Array)

2.      Cascaded Multilevel Inverter

3.      Pulse Width Modulation (PWMJ

4.      Total Harmonic Distortion (THD)

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig.1. Seven level Cascaded H-bridge multilevel inverter

EXPECTED SIMULATION RESULTS:

Fig.2. (a)Seven level cascaded MLI output voltage (b) Harmonic spectrum of the output voltage

Fig.3.(a) Seven level cascaded MLI output current (b) Harmonic

spectrum of the output current

Fig.4. (a) Output voltage of MLI with LC filter (b) Harmonic spectrum of

the output voltage with LC filter

Fig.5. (a) Output current of MLI with LC filter (b) Harmonic spectrum of

the output current with LC filter

Fig.6. (a) Output voltage of seven level multilevel inverter with unequal

voltage sources (b) Harmonic spectrum of the output voltage

Fig.7. (a) Output Current of seven level MLI with unequal voltage sources

(b) Harmonic spectrum of the output current

Fig.8. (a) Output voltage of seven level cascaded MLI with unequal voltage sources and LC filter (b) Harmonic spectrum of the output voltage with LC filter

Fig.9. (a) Output current of seven level cascaded MLI with unequal voltage sources and LC filter (b) Harmonic spectrum of the output current with LC filter

CONCLUSION:

In this paper, an analysis of a seven level cascaded H bridge multilevel inverter for a standalone photovoltaic system is carried out 1) with equal voltage sources as input to the H-bridges and 2) with unequal voltage sources as  input. It is found that when equal voltage values are fed as input to the H-bridges of the multilevel inverter, there is a reduction in the total harmonic distortion of the MLI output when compared to that with unequal voltage sources as its input. It is also observed that with an LC filter at the output stage of the multilevel inverter in both the scenarios, the total harmonic reduction is significantly reduced and the power quality of the PV fed multilevel inverter system is highly improved.

REFERENCES:

[1] Venkatachalam, Jovitha Jerome and J. Karpagam, "An experimental investigation on a multilevel inverter for solar energy applications," International Journal of Electrical Power and Energy Systems, 2013, pp.157-167.

[2] Ebrahim Babaei, Mohammad Farhadi and Farshid Najaty, "Symmetric and asymmetric multilevel inverter topologies with reduced switching devices," Electric Power Systems Research, 2012, pp. 122- 130.

[3] Jia-Min Shen, Hurng-Liahng Jinn-Chang Wu and Kuen-Der, "Five-Level Inverter for Renewable Power Generation System, IEEE transactions on energy conversion," 2013, pp.257-266.

[4] Hui Peng, Makoto Hagiwara and Hirofumi Akagi, "Modeling and Analysis of Switching-Ripple Voltage on the DC Link  between a Diode Rectifier and a Modular Multilevel Cascade Inverter (MMCI)," IEEE transactions on power electronics, 2013, pp.75-84.

[5] Javier Chavarria, Domingo Bie!, Francesc Guinjoan, Carlos Meza and Juan J. Negroni, "Energy-Balance Control of PV  Cascaded Multilevel Grid-Connected Inverters Under LevelShifted and Phase-Shifted PWMs," IEEE transactions on industrial electronics, 2013, pp.98-111.

Evaluation of DVR Capability Enhancement -Zero Active Power Tracking Technique

ABSTRACT:  

 This paper presents a utilization technique for enhancing the capabilities of dynamic voltage restorers (DVRs). This study aims to enhance the abilities of DVRs to maintain acceptable voltages and last longer during compensation. Both the magnitude and phase displacement angle of the synthesized DVR voltage are precisely adjusted to achieve lower power utilization. The real and reactive powers are calculated in real time in the tracking loop to achieve better conditions. This technique results in less energy being taken out of the DC-link capacitor, resulting in smaller size requirements. The results from both the simulation and experimental tests illustrate that the proposed technique clearly achieved superior performance. The DVR’s active action period was considerably longer, with nearly 5 times the energy left in the DC-link capacitor for further compensation compared to the traditional technique. This technical merit demonstrates that DVRs could cover a wider range of voltage sags; the practicality of this idea for better utilization is better than that of existing installed DVRs.

KEYWORDS:

1.      DVR capability

2.      Energy optimized

3.      Energy source

4.      Series compensator

5.      Voltage stability

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig. 1. Circuit diagram model for simulation using MatLab/Simulink.

 EXPECTED SIMULATION RESULTS:

Fig. 2. D-axis voltages at the system (VSd), DVR (VDVRd), and load (VLd). during in-phase compensation (simulation).

Fig. 3. Q-axis voltages at the system (VSq), DVR (VDVRq), and load (VLq) during in-phase compensation

(simulation).

Fig. 4. The overall three-phase voltage signals during in-phase compensation (simulation).

Fig. 5. Real power at source (PS), the DVR (PDVR) and load (PL) during in-phase compensation (simulation).

Fig. 6. The DVR DC-side voltage (VDC) during in-phase compensation (simulation).

Fig. 7. D-axis voltages at the system(VSd), DVR (VDVRd), and load (VLd) during zero-real power tracking compensation (simulation).

Fig. 8. Q-axis voltages at the system (VSq), DVR (VDVRq), and load (VLq) during zero-real power tracking compensation (simulation)..

Fig. 9. The overall three-phase voltage signals during zero-real power tracking compensation (simulation).

Fig. 10. The DVR DC-side voltage (VDC) during zero-real power tracking compensation (simulation).

CONCLUSION:

It is clear from both the simulation and experimental results illustrated in this paper that the proposed zero-real power tracking technique applied to DVR-based compensation can result in superior performance compared to the traditional in-phase technique. The experimental test results match those proposed using simulation, although some discrepancies due to the imperfect nature of the test circuit components were seen.

With the traditional in-phase technique, the compensation was performed and depended on the real power injected to the system. Then, more of the energy stored in the DC-link capacitor was utilized quickly, reaching its limitation within a shorter period. The compensation was eventually forced to stop before the entire voltage sag period was finished. When the compensation was conducted using the proposed technique, less energy was used for the converter basic switching process. The clear advantage in terms of the voltage level at the DC-link capacitor indicates that with the proposed technique, more energy remains in the DVR (67% to 14% in the traditional in-phase technique), which guarantees the correct compensating voltage will be provided for longer periods of compensation. With this technique, none (or less) of the real power will be transferred to the system, which provides more for the DVR to cover a wider range of voltage sags, adding more flexible adaptive control to the solution of sag voltage disturbances.

REFERENCES:

[1] M. Bollen, Understanding Power Quality Problems, Voltage Sags and Interruptions. New York: IEEE Press, 1999.

[2] J. Roldán-Pérez, A. García-Cerrada, J. L. Zamora-Macho, P. Roncero-Sánchez, and E. Acha, “Troubleshooting a digital repetitive controller for a versatile dynamic voltage restorer,” Int. J. Elect. Power Energy Syst., vol. 57, pp. 105–115, May 2014.

[3] P. Kanjiya, B. Singh, A. Chandra, and K. Al-Haddad, “SRF theory revisited to control self-supported dynamic voltage restorer (DVR) for unbalanced and nonlinear loads,” IEEE Trans. Ind. Appl., vol. 49, no. 5, pp. 2330–2340, Sep. 2013.

[4] S. Naidu, and D. Fernandes, “Dynamic voltage restorer based on a four-leg voltage source converter,” IET Generation, Transmission & Distribution, vol. 3, no. 5, pp. 437–447, May 2009.

[5] T. Jimichi, H. Fujita, and H. Akagi, “A dynamic voltage restorer equipped with a high-frequency isolated dc-dc converter,” IEEE Trans. Ind. Appl., vol. 47, no. 1, pp. 169– 175, Jan. 2011.