IEEE Transactions on Power Delivery, 2013
ABSTRACT
The dynamic
voltage restorer (DVR) is a series compensator for distribution system
applications, which protects sensitive loads against voltage sags by fast
voltage injection. The DVR must estimate the magnitude and phase of the
measured voltages to achieve the desired performance. This paper proposes a
phasor parameter estimation algorithm based on a recursive variable and fixed
data window Least Error Squares (LES) method for the DVR control system. The
proposed algorithm, in addition to decreasing the computational burden,
improves the frequency response of the control scheme based on the fixed data
window LES method. The DVR control system based on the proposed algorithm
provides a better compromise between the estimation speed and accuracy of the
voltage and current signals and can be implemented using a simple and low cost
processor. The results of the studies indicate that the proposed algorithm is
insensitive to noise, harmonics, interharmonics and DC offset unlike the LES
method, while both methods estimate the phasor parameters within 5 ms. The
performance of the control scheme based on the proposed method is evaluated by
multiple case studies in the PSCAD/EMTDC environment and experimentally
validated based on a laboratory setup.
KEYWORDS
1.
Dynamic
voltage restorer
2.
Phasor
estimation
3.
Least Error
Squares
4.
Minimum energy
5.
Four-leg
inverter
SOFTWARE:
MATLAB/SIMULINK
CIRCUIT
DIAGRAM:
Fig.
1 Power circuit schematic of the four-wire DVR
EXPECTED
SIMULATION RESULTS:
Fig. 2. Sag compensation during SLG fault in the
presence of zero sequence component, (a) Grid voltages (V), (b) Estimated grid
voltage magnitude of phase A by the improved phasor estimation method, LES, RLS
and ADALINE (V), (c) Compensated load voltages (V)
Fig. 3 Sag compensation under nonlinear load
conditions, (a) Grid voltages (V), (b) Load currents (A), (c) Compensated load
voltages (V)
Fig.
4. Comparison between the improved estimation method, LES, RLS and ADALINE
under nonlinear load conditions, (a) Estimated grid voltage magnitude of phase
A (V), (b) Estimated grid voltage angle of phase A (rad), (c) Estimated load
current angle of phase A (rad)
Fig.
5. Comparison between the improved estimation method, LES, RLS and ADALINE
under interharmonics and DC offset conditions, (a) Input signal (p.u.), (b)
Estimated magnitude (p.u.), (c) Estimated phase angle (rad)
CONCLUSION
This paper
proposes an improved phasor estimation method for DVR control system using a
recursive Least Error Squares (LES) method with fixed and variable data window
lengths. The proposed algorithm improves the frequency response of the control
scheme based on the fixed data window LES in additional to decreasing the computational
burden. Thus, it provides a desirable compromise among the speed, accuracy and
the amount of computations for the phasor estimation of DVR signals. The
experimental and simulation results confirmed that:
1) The estimation time is less than 5 ms and its accuracy increases
gradually and it is not sensitive to noise, harmonics, interharmonics and DC
offset. Consequently, it is fast and accurate.
2) The proposed algorithm is able to estimate several signal phasors
simultaneously in real-time using a low cost processor.
3) The proposed
scheme can compensate balanced and unbalanced sag scenarios accurately and
within the required time under linear and nonlinear load conditions.
Moreover, during
voltage sag compensation, the minimum energy is used and the voltage sags can
be compensated without any additional energy storage.
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