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Friday, 2 November 2018

An f-P/Q Droop Control in Cascaded-Type Microgrid



ABSTRACT:
In cascaded-type microgrid, the synchronization and power balance of distributed generators become two new issues that needs to be addressed urgently. To that end, an f-P/Q droop control is proposed in this letter, and its stability is analyzed as well. This proposed droop control is capable to achieve power balance under both resistive-inductive an resistive-capacitive loads autonomously. Compared with the inverse power factor droop control, an obvious advantage consists in extending the scope of application. Finally, the feasibility of the proposed method is verified by simulation results.

KEYWORDS:
1.      Cascaded-type microgrid
2.      Droop control
3.      Power balance

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:


Fig. 1. Structure of islanded cascaded-type microgrid.
CONTROL  SYSTEM:



Fig. 2. The local control diagram of the i-th DG.
EXPECTED SIMULATION RESULTS





Fig.3. Simulation results of case I. (a) Active power. (b) Reactive power





Fig. 4. Simulation results of case II. (a) Active power. (b) Reactive power.

 CONCLUSION:
A bridge modular switched-capacitor-based multilevel inverter with optimized UFD-SPWM control method is proposed in the paper. The switched-capacitor-based stage can obtain high conversion efficiency and multiple voltage levels. Meanwhile, it functions as an active energy buffer, enhancing the power decoupling ability and conducing to cut the total size of the twice-line energy buffering capacitance. Furthermore, voltage multi-level in DC-link reduces the switching loss of inversion stage because turn-off voltage stress of switches changes with phase of output voltage rather than always suffers from one relatively high DC voltage. Most importantly, the control method of UFD-SPWM, doubling equivalent witching frequency, is employed in the inversion stage for a high quality output waveform with reduced harmonic. In addition, the optimized voltage level phase maximizes the fundamental component in output voltage pulses to reduce harmonic backflow as possible. Hence, the comprehensive system efficiency has been promoted and up to peak value of 97.6%. Finally, two conversion stages are controlled independently for promoting reliability and decreasing complexity. In future work, detailed loss discussion, including theoretic calculation and validation of loss breakdown, will be presented.

REFERENCES:
[1] M. Jun, "A new selective loop bias mapping phase disposition PWM with dynamic voltage balance capability for modular multilevel converter," IEEE Trans. Ind. Electron., vol. 61, no. 2, pp. 798-807, Feb. 2014.
[2] N. Mehdi, and G. Moschopoulos, "A novel single-stage multilevel type full-bridge converter," IEEE Trans. Ind. Electron., vol. 60, no. 1, pp. 31-42, Jan. 2013.
[3] E. Ehsan and N. B. Mariun, "Experimental results of 47-level switchladder multilevel inverter," IEEE Trans. Ind. Electron., vol. 60, no. 11, pp. 4960-4967, Nov. 2013.
[4] J. Lai, “Power conditioning circuit topologies,” IEEE Trans. Ind. Electron., vol. 3, no. 2, pp. 24-34, Jun. 2009.
[5] L. He, C. Cheng, “Flying-Capacitor-Clamped Five-Level Inverter Based on Switched-Capacitor Topology,” IEEE Trans. Ind. Electron., vol. 63, no.12, pp. 7814-7822, Sep. 2016.