ABSTRACT:
In
this paper the standalone operation of the modified seven-level Packed U-Cell
(MPUC) inverter is presented and analyzed. The MPUC inverter has two DC sources
and six switches, which generate seven voltage levels at the output. Compared
to cascaded H-bridge and neutral point clamp multilevel inverters, the MPUC
inverter generates a higher number of voltage levels using fewer components.
The experimental results of the MPUC prototype validate the appropriate
operation of the multilevel inverter dealing with various load types including
motor, linear, and nonlinear ones. The design considerations, including output
AC voltage RMS value, switching frequency, and switch voltage rating, as well
as the harmonic analysis of the output voltage waveform, are taken into account
to prove the advantages of the introduced multilevel inverter.
KEYWORDS:
1. Multilevel
inverter
2. Packed
u-cell
3. Power
quality
4. Multicarrier
PWM
5. Renewable
energy conversion
SOFTWARE: MATLAB/SIMULINK
CIRCUIT DIAGRAM:
Figure 1. Single-phase seven-level MPUC inverter
in standalone mode of operation
EXPECTED SIMULATION RESULTS:
Figure 2. Seven-level MPUC inverter output voltage
and current with DC source voltages. Ch1: V1,
Ch2:
V2, Ch3: Vab, Ch4: il.
Figure 3. One cycle of output voltage and gate
pulses of MPUC inverter switches. Ch1: Vab, Ch2:
T1
gate
pulses, Ch3: T2 gate pulses, Ch4: T3
gate pulses
Figure 4. MPUC inverter switches’ voltage ratings.
Ch1: Vab, Ch2: T1 voltage, Ch3:
T2 voltage, Ch4:
T3
voltage. and nonlinear). The step-by-step process for connecting loads is
depicted in Figure 7, which show
Fig.5.
Test results when a nonlinear load is connected to the MPUC inverter.Ch1 :Vab :Ch4 :il.
Figure 6. Output voltage and current waveform of
MPUC inverter when different loads are added
step
by step. Ch1: Vab, Ch4: il. (A) Transient state when nonlinear load
is added to the RL load (left)
and
after a while a motor load is added to the system (right); (B) steady state when a nonlinear load
is
added
to the RL load (left) and after a while a motor load is added to the system
(right).
Figure 7. Voltage and current waveform of MPUC
inverter with RMS calculation for 120 V system.
CONCLUSION:
In
this paper a reconfigured PUC inverter topology has been presented and studied
experimentally. The proposed MPUC inverter can generate a seven-level voltage
waveform at the output with low harmonic contents. The associated switching
algorithm has been designed and implemented on the introduced MPUC topology
with reduced switching frequency aspect. Switches’ frequencies and ratings have
been investigated experimentally to validate the good dynamic performance of the
proposed topology. Moreover, the comparison of MPUC to the CHB multilevel
inverter showed other advantages of the proposed multilevel inverter topology,
including fewer components, a lower manufacturing price, and a smaller package
due to reduced filter size.
Author
Contributions: All authors contributed equally to the
work presented in this paper.
Funding:
This
research received no external funding.
Conflicts
of Interest: The authors declare no conflict of
interest.
REFERENCES:
1. Bose, B.K. Multi-Level Converters; Multidisciplinary Digital
Publishing Institute: Basel, Switzerland, 2015.
2. Mobarrez, M.; Bhattacharya, S.; Fregosi, D. Implementation of
distributed power balancing strategy with a layer of supervision in a
low-voltage DC microgrid. In Proceedings of the 2017 IEEE Applied Power Electronics
Conference and Exposition (APEC), Tampa, FL, USA, 26–30 March 2017; pp.
1248–1254.
3. Franquelo, L.G.; Rodriguez, J.; Leon, J.I.; Kouro, S.; Portillo,
R.; Prats, M.A.M. The age of multilevel converters arrives. IEEE Ind. Electron.
Mag. 2008, 2, 28–39. [CrossRef]
4. Malinowski, M.; Gopakumar, K.; Rodriguez, J.; Perez, M.A. A
survey on cascaded multilevel inverters. IEEE Trans. Ind. Electron. 2010,
57, 2197–2206. [CrossRef]
5. Nabae, A.; Takahashi, I.; Akagi, H. A new neutral-point-clamped
PWM inverter. IEEE Trans. Ind. Appl. 1981,5, 518–523. [CrossRef]
