ABSTRACT:
The inceptions of multilevel inverters
(MLI) have caught the attention of researchers for medium and high power
applications. However, there has always been a need for a topology with a lower
number of device count for higher efficiency and reliability. A new single-phase
MLI topology has been proposed in this paper to reduce the number of switches
in the circuit and obtain higher voltage level at the output. The basic unit of
the proposed topology produces 13 levels at the output with three dc voltage sources
and eight switches. Three extentions of the basic unit have been proposed in
this paper. A detailed analysis of the proposed topology has been carried out
to show the superiority of the proposed converter with respect to the other
existing MLI topologies. Power loss analysis has been done using PLECS
software, resulting in a maximum efficiency of 98.5%. Nearest level control
(NLC) pulse-width modulation technique has been used to produce gate pulses for
the switches to achieve better output voltage waveform. The various simulation
results have been performed in the PLECS software and a laboratory setup has
been used to show the feasibility of the proposed MLI topology.
KEYWORDS:
1.
DC/AC
converter
2.
Multilevel
inverter
3.
Reduce
switch count
4.
Nearest
level control (NLC)
SOFTWARE: MATLAB/SIMULINK
CIRCUIT DIAGRAM:
Figure 1. Basic unit of the
proposed topology.
Figure 2. Simulation results with (a) dynamic
change of modulation
index
(b) FFT of 13 level output voltage and current with ZD10C100mH
and
(c) output voltage and current waveforms with change of load from
ZD50
to ZD50C100mH.
CONCLUSION:
The paper presents a novel MLI topology
with multiple extension capabilities. The basic unit of the proposed topology produces
13 levels using eight unidirectional switches and three dc voltage sources. Three
different extension of the basic unit has been proposed. The performance
analysis of the basic unit of the proposed topology has been done and the
comparative results with some recently proposed topologies in literature have
been presented in the paper. Further, a power loss analysis of the dynamic
losses (switching and conduction) in the MLI has also been presented, which
gives the maximum efficiency of the basic unit as 98.5%. The power loss
distribution in all the switches for different combination of loads have also
been demonstrated in the paper. The performance of the proposed topology has
been simulated with dynamic modulation indexes and different combination of
loads using PLECS software. A prototype of the basic unit has been developed in
the laboratory and the simulation results have been validated using the different
experimental results considering different modulation indexes.
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