A Novel Control Strategy for a Variable-Speed Wind Turbine With a Permanent-Magnet Synchronous Generator

 ABSTRACT:

This paper presents a novel control strategy for the operation of a direct-drive permanent-magnet synchronous generator- based stand-alone variable-speed wind turbine. The control strategy for the generator-side converter with maximum power extraction is presented. The stand-alone control is featured with output voltage and frequency controller that is capable of handling variable load. The potential excess of power is dissipated in the dump-load resistor with the chopper control, and the dc-link voltage is maintained. Dynamic representation of dc bus and small-signal analysis are presented. Simulation results show that the controllers can extract maximum power and regulate the voltage and frequency under varying wind and load conditions. The controller shows very good dynamic and steady-state performance.

KEYWORDS:

1.      Maximum power extraction

2.      Permanent magnet synchronous generator (PMSG)

3.       Switch-mode rectifier 

4.      Variable-speed wind turbine

5.      Voltage and frequency control

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig.1. Control structure of a PMSG-based stand-alone variable-speed wind turbine.

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Response of the system for a step change of wind speed from 10 to 12 to 9 to 10 m/s. (a) Wind speed. (b) Generator speed. (c) Turbine torque and torque reference. (d) Torque reference and generator electromagnetic torque. (e) DC current reference and dc current. (f) DC power output.

Fig. 3. Optimum torque and generator torque.

Fig. 4. Turbine mechanical input power and electrical output power.

 Fig. 5. Instantaneous and rms voltage and currents at a constant load (full load). (a) Instantaneous load voltages. (b) RMS line voltage. (c) Instantaneous line currents. (d) RMS line current.

 

Fig. 6. DC-link voltage, rms load voltage, rms line current, frequency, and modulation index at a constant load (full load). (a) DC-link voltage. (b) RMS  load voltage (L–L). (c) RMS load current. (d) Frequency. (e)Modulation index.

 Fig. 7. Instantaneous and rms voltage and current responses when the load changes from 100% to 50% and from 50% to 100%. (a) Instantaneous load voltages. (b) RMS line voltage. (c) Instantaneous line currents. (d) RMS line current.

 

Fig. 8. Response of dc-link voltage, rms load voltage, rms line current, frequency, and modulation index when the load changes from 100% to 50% and from 50% to 100%. (a) DC-link voltage. (b) RMS load voltage (L–L). (c) RMS load current. (d) Frequency. (e) Modulation index.

 

CONCLUSION:

 

A control strategy for a direct-drive stand-alone variable speed wind turbine with a PMSG has been presented in this paper. A simple control strategy for the generator-side converter to extract maximum power is discussed and implemented using Simpower dynamic-system simulation software. The controller is capable of maximizing output of the variable-speed wind turbine under fluctuating wind. The load-side PWM inverter is controlled using vector-control scheme to maintain the amplitude and frequency of the inverter output voltage. It is seen that the controller can maintain the load voltage and frequency quite well at constant load and under varying load condition. The generating system with the proposed control strategy is suitable for a small-scale stand-alone variable-speed wind-turbine installation for remote-area power supply. The simulation results demonstrate that the controller works very well and shows very good dynamic and steady-state performance.

REFERENCES:

[1] S. Müller, M. Deicke, and R. W. De Doncker, “Doubly fed induction generator system for wind turbines,” IEEE Ind. Appl. Mag., vol. 8, no. 3, pp. 26–33, May 2002.

[2] H. Polinder, F. F. A. Van der Pijl, G. J. de Vilder, and P. J. Tavner, “Comparison of direct-drive and geared generator concepts for wind turbines,” IEEE Trans. Energy Convers., vol. 3, no. 21, pp. 725–733, Sep. 2006.

[3] T. F. Chan and L. L. Lai, “Permanent-magnet machines for distributed generation: A review,” in Proc. IEEE Power Eng. Annu. Meeting, 2007, pp. 1–6.

[4] M. De Broe, S. Drouilhet, and V. Gevorgian, “A peak power tracker for small wind turbines in battery charging applications,” IEEE Trans. Energy Convers., vol. 14, no. 4, pp. 1630–1635, Dec. 1999.

[5] R. Datta and V. T. Ranganathan, “A method of tracking the peak power points for a variable speed wind energy conversion system,” IEEE Trans. Energy Convers., vol. 18, no. 1, pp. 163–168, Mar. 1999.

A New Space Vector Pulse Width Modulated Transformer Less Single-Phase Unified Power Quality Conditioner

 ABSTRACT:

Emergence of solid-state switching devices, like thyristors, GTO’s, IGBT’s and etc, are widely used for controlling electric power in power electronic equipment for various purpose such as HVDC systems, computers etc. These devices draw disturbance in voltages and currents of both source side and distribution ends due to its non-linearity. This induce harmonics, reactive power, and excess neutral current cause the system to have less efficiency and reduction in power factor. In this paper transformer less single-phase unified power quality conditioner has been implemented to reduce the voltage and current distortions. The operation and control of single-phase transformer less three leg Unified power quality conditioner is investigated with the implementation of a new pulse width modulation method for solving the coupling problem introduced by common leg switches.

KEYWORDS:

1.      TL-UPQC

2.      SVPWM

3.      Harmonics

4.      Total harmonic distortion

5.      DSTACOM

6.      DVR

SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:

Fig. 1. Block Diagram for Harmonic Reduction Using UPQC.

EXPECTED SIMULATION RESULTS:

Fig. 2. DC- link Voltage Waveforms.

Fig. 3. Source Current Waveforms.

Fig. 4. % THD of Source Side Current.

Fig. 5. Switching pulses of Inverter.

Fig. 6. Waveform of Supply side, Load side Voltage and Distorted Voltage at Supply Side. 

Fig. 7. % THD of Distorted Voltage Waveform.

CONCLUSION:

 

The custom power devices such as DVR helps in compensation of voltage unbalances and DTATCOM helps in the elimination of current harmonics that are entering the circuit due to the presence of a non-linear load at the consumer side. By using a unified power quality conditioner both the issues such as compensation of voltage unbalances and elimination of current harmonics can be minimized. The replacement of the series transformer with a series inductance helps to overcome the issues of cost and weight of the system. The working principle and implementation of practical two-level space vector modulation has been shown. The special switching sequence incorporated in space vector modulation technique technique used here minimizes the coupling issues that occur in the common leg operation.

REFERENCES:

[1] A. Bendre, D. Divan, W. Kranz, W. Brumsickle, Equipment failures caused by power quality disturbances, in: Proc. IEEE IAS Annual Meeting, 2004, pp. 482– 489.

[2] I. Hunter, Power quality issues-a distribution company perspective, Power Eng. J., 15 (2) (Apr. 2001) 75–80.

[3] B. Singh, K. Al-Haddad, A. Chandra, A review of active filters for power quality improvement, IEEE Trans. Ind. Electron., 46 (5) (Oct. 1999) 960–971.

[4] P. Curtis, The fundamentals of power quality and their associated problems, IEEE Press, Wiley, 2007.

[5] M. El-Habrouk, M.K. Darwish, P. Mehta, Active power filters: a review, IEE Proc., Electr. Power Appl. 147 (5) (2000) 403, https://doi.org/10.1049/ipepa: 20000522.

 

A New Cascaded Multilevel Inverter Topology with Galvanic Isolation

 ABSTRACT:

 This paper presents a new compact three-phase cascaded multilevel inverter (CMLI) topology with reduced device count and high frequency magnetic link. The proposed topology overcomes the predominant limitation of separate DC power supplies, which CMLI always require. The high frequency magnetic link also provides a galvanic isolation between the input and output sides of the inverter, which is essential for various grid-connected applications. The proposed topology utilizes an asymmetric inverter configuration that consists of cascaded H-bridge cells and a conventional three-phase two-level inverter. A toroidal core is employed for the high frequency magnetic link to ensure compact size and high-power density. Compared with counterpart CMLI topologies available in the literatures, the proposed inverter has the advantage of utilizing the least number of power electronic components without compromising the overall performance, particularly when a high number of output voltage levels is required. The feasibility of the proposed inverter is confirmed through extensive simulation and experimentally validated studies.

KEYWORDS:

1.      Cascaded multilevel inverter

2.      Isolated dc-supply

3.      Asymmetric multilevel inverter

4.      High frequency magnetic link

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig.1 Proposed cascaded multilevel inverter, (a) Proposed inverter when H-bridges are considered as cascaded cells, (b) A basic H-bridge

 EXPECTED SIMULATION RESULTS:

 Fig.2 Simulation results for a dynamic change in the load from nearly unity PF (100.31∠4.49°Ω) to 0.8 lagging PF (127.13∠38.13°Ω): (a) line voltage waveforms, (b) line current waveforms

Fig. 3 Simulation results for a dynamic change in the load magnitude with the same PF: (a) line voltage waveforms, (c) line current waveforms

Fig. 4 Simulation results of rectifier output currents: IC, I1, I2 and the MLI output voltage and current, VAB and IAN for asymmetric CHB input voltages

Fig. 5 Simulation results of rectifier output currents: IC, I1, I2 and the MLI output voltage and current, VAB and IAN for unbalanced CHB input voltages

 CONCLUSION:

 A new high frequency magnetic linked-based cascaded multilevel inverter is presented in this paper. The proposed concept exhibits several advantageous when compared with counterpart topologies proposed in the literatures. This includes the ability to extend the single-phase inverter to a three-phase structure without tripling the power electronic components as per the current practice in the literatures. Experimental and simulation analyses reveal the feasible applications of the proposed inverter with renewable energy sources of intermittent characteristics. Results also show the performance of the proposed inverter is not significantly impacted during load dynamic changes. The proposed concept is easy to implement as it can employ any cascaded inverter topology within a cascaded stage along with a simple conventional three-phase two-level inverter stage.

REFERENCES:

[1] W. Kawamura, M. Hagiwara, H. Akagi, M. Tsukakoshi, R. Nakamura, and S. Kodama, "AC-Inductors Design for a Modular Multilevel TSBC Converter, and Performance of a Low-Speed High-Torque Motor Drive Using the Converter," IEEE Trans. Ind. Appl., vol. PP, pp. 1-1, 2017.

[2] V. Sonti, S. Jain, and S. Bhattacharya, "Analysis of the Modulation Strategy for the Minimization of the Leakage Current in the PV Grid-Connected Cascaded Multilevel Inverter," IEEE Trans. Power. Electron., vol. 32, pp. 1156-1169, 2017.

[3] B. Xiao, L. Hang, J. Mei, C. Riley, L. M. Tolbert, and B. Ozpineci, "Modular cascaded H-bridge multilevel PV inverter with distributed MPPT for grid-connected applications," IEEE Trans. Ind. Appl., vol. 51, pp. 1722-1731, 2015.

[4] C. Gan, J. Wu, Y. Hu, S. Yang, W. Cao, and J. M. Guerrero, "New Integrated Multilevel Converter for Switched Reluctance Motor Drives in Plug-in Hybrid Electric Vehicles With Flexible Energy Conversion," IEEE Trans. Power. Electron., vol. 32, pp. 3754-3766, 2017.

[5] E. Babaei, S. Laali, and Z. Bayat, "A single-phase cascaded multilevel inverter based on a new basic unit with reduced number of power switches," IEEE Trans. Ind. Electron., vol. 62, pp. 922-929, 2015.

A New Boost Switched-Capacitor Multilevel Converter with Reduced Circuit Devices

ABSTRACT:

 In this paper, a novel platform for the single phase switched-capacitor multilevel inverters (SCMLIs) is presented. It has several advantages over the classical topologies such as: An appropriate boosting property, higher efficiency, lower number of required dc voltage sources and other accompanying components with less complexity and lower cost. The basic structure of the proposed converter is capable of making nine-level of the output voltage under different kinds of loading conditions. Hereby, by using the same two capacitors paralleled to a single dc source, a switched-capacitor (SC) cell is made that contributes to boosting the value of the input voltage. In this case, the balanced voltage of the capacitors can be precisely provided on the basis of the series-parallel technique and the redundant switching states. Afterwards, to reach the higher number of output voltage levels, two suggested SC cells are connected to each other with a new extended configuration. Therefore, by the use of a reasonable number of required power electronic devices, and also by utilizing only two isolated dc voltage sources, which their magnitudes can be designed based on either symmetric or asymmetric types, a 17- and 49-level of the output voltage are obtained. Based on the proposed extended configuration, a new generalized version of SCMLIs is also derived. To confirm the precise performance of the proposed topologies, apart from the theoretical analysis and a complete comparison, several simulation and experimental results are also given.

KEYWORDS:

1.      Charge balancing control

2.      Multilevel inverters

3.      Reduced circuit devices

4.      Switched-capacitor cell

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Proposed Switched-capacitor multilevel inverter (SCMLI) structure

EXPECTED SIMULATION RESULTS:

Fig. 2. The nine-level output voltage and current waveforms (a) for inductive load (experiment) (200 V/div&2 A/div) (b) for resistive load (experiment) (200 V/div& 2 A/div) (c) for inductive load (simulation) (d) for resistive load (simulation).

Fig. 3. The balanced voltage of capacitors in the experiments (50 V/div).

 

 

Fig. 4. The PIVs of the involved power switches based on the experimental result.

 

Fig. 5. The input current waveform under the inductive loading condition based on the experimental result (2 A/div).

 

Fig. 6. The output voltage and current waveforms (a) from no-load to full-load (200 V/div & 5 A/div experiment) (b) from full-load to no-load (200 V/div & 5 A/div experiment) (c) from no-load to full-load (simulation) (d) from full-load to no-load (simulation).

Fig. 7. The output and capacitors voltage waveforms within a step change of load based on experimental results.

Fig. 8. Output voltage and current waveforms of the proposed symmetric 17-level structure in the experiments (250 V/div& 5 A/div).

Fig. 9. Voltage across capacitors based on the experimental results (25 V/div) (Voltage ripple 2.5 V/div).

CONCLUSION:

 In this study, a new basic topology of SCMLIs has been proposed which offers features like boosting capability, reduction in number of circuit components, higher efficiency and lower overall cost. The basic structure of the proposed SCMLI has only one dc source integrated into a novel SC cell. In this case, by aiming the series/parallel conversion of switches and also the redundant switching states, nine-level of the output voltage with only eight gate drivers has been obtained. Afterwards, in order to achieve further number of output voltage levels, an extended structure of the proposed SCMLI based on two isolated modules of the integrated SC cells has been presented. In respect to the proposed extended SCMLI, a generalized topology based on different numbers of involved SC cells has also been introduced. Then, determination of capacitance besides a power loss analysis is developed for the basic structure of the proposed SCMLI. A comprehensive comparison with other recently presented structures has also highlighted the potential of the proposed topologies. Finally, to demonstrate the precise performance of the proposed SCMLI configurations, various types of simulation and experimental tests under different kinds of loading conditions have been given.

REFERENCES:

[1] S. B. Kjaer, J K. Pedersen, and F. Blaabjerg, “A review of single-phase grid-connected inverters for photovoltaic modules,” IEEE Trans. Ind. Electron., vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005.

[2] M. Islam, S. Mekhilef and M. Hasan, "Single phase transformerless inverter topologies for grid-tied photovoltaic system: A review", Renew. Sustainable Energy Rev., vol. 45, pp. 69-86, 2015.

[3] R. R. Errabelli, and P. Mutschler, “Fault- tolerant voltage source inverter for permanent magnet drives,” IEEE Trans. Power Electron., vol. 27, no. 2, pp. 500-508, Feb. 2012.

[4] F. Z. Peng, “Z-source inverter,” IEEE Trans. Ind. Appl., vol. 39, no. 2, pp. 504–510, Mar./Apr. 2003.

[5] H. Fathi and H. Madadi “Enhanced-boost Z-source inverters with switched Z-impedance,” IEEE. Trans. Ind. Electron, vol. 63, no. 2, pp. 691-703, Feb. 2016.

A Multi-Cell 21-Level Hybrid Multilevel Inverter synthesizes a reduced number of components with Voltage Boosting Property

 ABSTRACT:

A multi-cell hybrid 21-Level multilevel inverter is proposed in this paper. The proposed topology includes two-unit; an H-bridge is cascaded with a modified K-type unit to generate an output voltage waveform with 21 levels based only on two unequal DC suppliers. The proposed topology's advantage lies in the fine and clear output voltage waveforms with high output efficiency. Meanwhile, the high number of output voltage waveform levels generates a low level of distortion and reduces the level of an electromagnetic interface (EMI). Moreover, it reduces the voltage stress on the switching devices and gives it a long lifetime. Also, the reduction in the number of components has a noticeable role in saving size and cost. Regarding the capacitors charging, the proposed topology presents an online method for charging and balancing the capacitor's voltage without any auxiliary circuits. The proposed topology can upgrade to a high number of output steps through the cascading connection. Undoubtedly this cascading will increase the power level to medium and high levels and reduce the harmonics content to a neglectable rate. The proposed system has been tested through the simulation results, and an experimental prototype based on the controller dSPACE (DS-1103) hardware unit used to support the simulation results.

KEYWORDS:

 

1.      21-Level Multilevel Inverter (MLI)

2.      Hybridization

3.      Modified K-type inverter

4.      Online charging

5.      Self-balancing

6.      Voltage boosting inverter

7.      Total Harmonic Distortion (THD)

SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:

Figure.1 Proposed Hybrid MLI Topology

 EXPECTED SIMULATION RESULTS:

Figure.2 21L MLI output voltage waveform

Figure.3 FFT analysis of the 21L output voltage waveform

Figure.4 Capacitor voltages and the output voltage waveform

 

Figure.5 Output voltage and load current waveforms

Figure.6 63L cascaded system output voltage and load current

Figure.7 FFT analysis of the 63L output voltage waveform

Figure.8 Output voltages of 2HB+K cascaded system units

Figure.9 147L cascaded system output voltage and load current

Figure.10 FFT analysis of the 147L output voltage waveform

 

Figure.11 Output voltages of Asymmetrical cascaded system units

 CONCLUSION:

 The work in this paper presented a hybrid multilevel inverter that consisted of a series connection between two units (an HB unit with a modified K-Type unit). This combination generates an output voltage waveform with 21 steps. This high number steps in the output voltage help in reducing the level of noises in the output voltage and reduced the stress in the switching devices, which on the one hand generating fine and clear waveforms and on the other hand reduces the harmonic content in the waveforms to a deficient level (satisfying the harmonics standard IEEE519). Economically, the structure of the proposed topology presented an optimal design in terms of reducing the number of switches and DC sources which in turn enhancing the system reliability by reducing the inverter cost. For the capacitors charging process, the paper presents an online method for charging and balancing the capacitor voltages without any auxiliary circuits for that. This helps in the continuous operation of the charging and discharging process for the capacitor without disturbing the process of generating the output voltage. The proposed topology supports the modularity process in order to maximize the range of output power to the medium and high level, and the paper presented two scenarios for the series connection 2HB+K and HB+2K both the cases raise the level of the output power and enhances the system performance to achieve high efficiency. Due to the dependence on multi DC sources, this topology is suitable for renewable energy applications; DC sources are abundant. The hybrid renewable energy sources application will be more appropriate between all the renewable energy applications because the proposed topology-based mainly on two unequal DC suppliers, which will be available easily in the hybrid renewable energy sources.

 REFERENCES:

[1] F. Z. Peng, W. Qian, and D. Cao, "Recent advances in multilevel converter/inverter topologies and applications," in The 2010 International Power Electronics Conference-ECCE ASIA-, 2010, pp. 492-501.

[2] J. Rodriguez, J.-S. Lai, and F. Z. Peng, "Multilevel inverters: a survey of topologies, controls, and applications," IEEE Transactions on Industrial Electronics, vol. 49, pp. 724-738, 2002.

[3] L. M. Tolbert and X. Shi, "Multilevel power converters," in Power Electronics Handbook, ed: Elsevier, 2018, pp. 385-416.

[4] K. K. Gupta, A. Ranjan, P. Bhatnagar, L. K. Sahu, and S. Jain, "Multilevel inverter topologies with reduced device count: A review," IEEE transactions on power electronics, vol. 31, pp. 135-151, 2015.

[5] P. Omer, J. Kumar, and B. S. Surjan, "A Review on Reduced Switch Count Multilevel Inverter Topologies," IEEE Access, vol. 8, pp. 22281-22302, 2020.