ABSTRACT:
In this paper, a novel platform for the
single phase switched-capacitor multilevel inverters (SCMLIs) is presented. It
has several advantages over the classical topologies such as: An appropriate
boosting property, higher efficiency, lower number of required dc voltage
sources and other accompanying components with less complexity and lower cost. The
basic structure of the proposed converter is capable of making nine-level of
the output voltage under different kinds of loading conditions. Hereby, by
using the same two capacitors paralleled to a single dc source, a
switched-capacitor (SC) cell is made that contributes to boosting the value of
the input voltage. In this case, the balanced voltage of the capacitors can be
precisely provided on the basis of the series-parallel technique and the
redundant switching states. Afterwards, to reach the higher number of output
voltage levels, two suggested SC cells are connected to each other with a new
extended configuration. Therefore, by the use of a reasonable number of
required power electronic devices, and also by utilizing only two isolated dc
voltage sources, which their magnitudes can be designed based on either
symmetric or asymmetric types, a 17- and 49-level of the output voltage are
obtained. Based on the proposed extended configuration, a new generalized
version of SCMLIs is also derived. To confirm the precise performance of the
proposed topologies, apart from the theoretical analysis and a complete
comparison, several simulation and experimental results are also given.
KEYWORDS:
1. Charge balancing control
2. Multilevel inverters
3. Reduced circuit devices
4. Switched-capacitor cell
SOFTWARE: MATLAB/SIMULINK
BLOCK DIAGRAM:
Fig.
1. Proposed Switched-capacitor multilevel inverter (SCMLI) structure
EXPECTED SIMULATION RESULTS:
Fig.
2. The nine-level output voltage and current waveforms (a) for inductive load
(experiment) (200 V/div&2 A/div) (b) for resistive load (experiment) (200
V/div& 2 A/div) (c) for inductive load (simulation) (d) for resistive load
(simulation).
Fig.
3. The balanced voltage of capacitors in the experiments (50 V/div).
Fig. 4. The PIVs of the involved power switches based on the
experimental result.
Fig.
5. The input current waveform under the inductive loading condition based on
the experimental result (2 A/div).
Fig.
6. The output voltage and current waveforms (a) from no-load to full-load (200
V/div & 5 A/div experiment) (b) from full-load to no-load (200 V/div &
5 A/div experiment) (c) from no-load to full-load (simulation) (d) from
full-load to no-load (simulation).
Fig.
7. The output and capacitors voltage waveforms within a step change of load
based on experimental results.
Fig.
8. Output voltage and current waveforms of the proposed symmetric 17-level
structure in the experiments (250 V/div& 5 A/div).
Fig.
9. Voltage across capacitors based on the experimental results (25 V/div)
(Voltage ripple 2.5 V/div).
CONCLUSION:
In
this study, a new basic topology of SCMLIs has been proposed which offers
features like boosting capability, reduction in number of circuit components,
higher efficiency and lower overall cost. The basic structure of the proposed
SCMLI has only one dc source integrated into a novel SC cell. In this case, by
aiming the series/parallel conversion of switches and also the redundant
switching states, nine-level of the output voltage with only eight gate drivers
has been obtained. Afterwards, in order to achieve further number of output
voltage levels, an extended structure of the proposed SCMLI based on two
isolated modules of the integrated SC cells has been presented. In respect to
the proposed extended SCMLI, a generalized topology based on different numbers
of involved SC cells has also been introduced. Then, determination of
capacitance besides a power loss analysis is developed for the basic structure
of the proposed SCMLI. A comprehensive comparison with other recently presented
structures has also highlighted the potential of the proposed topologies.
Finally, to demonstrate the precise performance of the proposed SCMLI
configurations, various types of simulation and experimental tests under
different kinds of loading conditions have been given.
REFERENCES:
[1]
S. B. Kjaer, J K. Pedersen, and F. Blaabjerg, “A review of single-phase
grid-connected inverters for photovoltaic modules,” IEEE Trans. Ind.
Electron., vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005.
[2]
M. Islam, S. Mekhilef and M. Hasan, "Single phase transformerless inverter
topologies for grid-tied photovoltaic system: A review", Renew.
Sustainable Energy Rev., vol. 45, pp. 69-86, 2015.
[3]
R. R. Errabelli, and P. Mutschler, “Fault- tolerant voltage source inverter for
permanent magnet drives,” IEEE Trans. Power Electron., vol. 27, no. 2,
pp. 500-508, Feb. 2012.
[4]
F. Z. Peng, “Z-source inverter,” IEEE Trans. Ind. Appl., vol. 39, no. 2,
pp. 504–510, Mar./Apr. 2003.
[5] H. Fathi and
H. Madadi “Enhanced-boost Z-source inverters with switched Z-impedance,” IEEE.
Trans. Ind. Electron, vol. 63, no. 2, pp. 691-703, Feb. 2016.
