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Tuesday, 22 February 2022

A Highly Efficient and Reliable Inverter Configuration Based Cascaded Multi-Level Inverter for PV Systems

 ABSTRACT:

This paper presents an improved Cascaded Multi-Level Inverter (CMLI) based on a highly efficient and reliable configuration for the minimization of the leakage current. Apart from a reduced switch count, the proposed scheme has additional features of low switching and conduction losses. The proposed topology with the given PWM technique reduces the high-frequency voltage transitions in the terminal and common-mode voltages. Avoiding high-frequency voltage transitions achieves the minimization of the leakage current and reduction in the size of EMI filters. Furthermore, the extension of the proposed CMLI along with the PWM technique for 2m+1 levels is also presented, where m represents the number of Photo Voltaic (PV) sources. The proposed PWM technique requires only a single carrier wave for all 2m+1 levels of operation. The Total Harmonic Distortion (THD) of the grid current for the proposed CMLI meets the requirements of IEEE 1547 standard. A comparison of the proposed CMLI with the existing PV Multi-Level Inverter (MLI) topologies is also presented in the paper. Complete details of the analysis of PV terminal and common-mode voltages of the proposed CMLI using switching function concept, simulations, and experimental results are presented in the paper.

KEYWORDS:

1.      Cascaded multi-level inverter

2.      Leakage current

3.      Common-mode voltage

4.      Terminal voltage

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

 


Fig. 1. Proposed five-level grid-connected CMLI with PV and parasitic elements.

 EXPECTED SIMULATION RESULTS:

Fig. 2. Simulation results of proposed five-level CMLI showing the waveforms of : (a) output voltage vuv; (b) grid current iac; (c) terminal voltage vxg; (d) terminal voltage vyg; (e) terminal voltage vzg; (f) leakage current ileak; (g) common-mode voltage vcm.

CONCLUSION:

 

In this paper, an improved five-level CMLI with low switch count for the minimization of leakage current in a transformerless PV system is proposed. The proposed CMLI minimizes the leakage current by eliminating the high-frequency transitions in the terminal and common-mode voltages. The proposed topology also has reduced conduction and switching losses which makes it possible to operate the CMLI at high switching frequency. Furthermore, the solution for generalized 2m+1 levels CMLI is also presented in the paper. The given PWM technique requires only one carrier wave for the generation of 2m+1 levels. The operation, analysis of terminal and common-mode voltages for the CMLI is also presented in the paper. The simulation and experimental results validate the analysis carried out in this paper. The MPPT algorithm is also integrated with the proposed five-level CMLI to extract the maximum power from the PV panels. The proposed CMLI is also compared with the other existing MLI topologies in Table V to show its advantages.

REFERENCES:

[1] Y. Tang, W. Yao, P.C. Loh and F. Blaabjerg, "Highly Reliable Transformerless Photovoltaic Inverters With Leakage Current and Pulsating Power Elimination," IEEE Trans. Ind. Elect., vol. 63, no. 2, pp. 1016-1026, Feb. 2016.

[2] W. Li, Y. Gu, H. Luo, W. Cui, X. He and C. Xia, "Topology Review and Derivation Methodology of Single-Phase Transformerless Photovoltaic Inverters for Leakage Current Suppression," IEEE Trans. Ind. Elect., vol. 62, no. 7, pp. 4537-4551, July 2015.

[3] J. Ji, W. Wu, Y. He, Z. Lin, F. Blaabjerg and H. S. H. Chung, "A Simple Differential Mode EMI Suppressor for the LLCL-Filter-Based Single-Phase Grid-Tied Transformerless Inverter," IEEE Trans. Ind. Elect., vol. 62, no. 7, pp. 4141-4147, July 2015.

[4] Y. Bae and R.Y.Kim, "Suppression of Common-Mode Voltage Using a Multicentral Photovoltaic Inverter Topology With Synchronized PWM," IEEE Trans. Ind. Elect., vol. 61, no. 9, pp. 4722-4733, Sept. 2014.

[5] N. Vazquez, M. Rosas, C. Hernandez, E. Vazquez and F. J. Perez-Pinal, "A New Common-Mode Transformerless Photovoltaic Inverter," IEEE Trans. Ind. Elect., vol. 62, no. 10, pp. 6381-6391, Oct. 2015.