A Novel Nine-Level Inverter Employing One Voltage Source and Reduced Components as High Frequency AC Power Source

 ABSTRACT:

Increasing demands for power supplies have contributed to the population of high frequency ac (HFAC) power distribution system (PDS), and in order to increase the power capacity, multilevel inverters (MLIs) frequently serving as the high-frequency (HF) source-stage have obtained a prominent development. Existing MLIs commonly use more than one voltage source or a great number of power devices to enlarge the level numbers, and HF modulation (HFM) methods are usually adopted to decrease the total harmonic distortion (THD). All of these have increased the complexity and decreased the efficiency for the conversion from dc to HF ac. In this paper, a nine-level inverter employing only one input source and fewer components is proposed for HFAC PDS. It makes full use of the conversion of series and parallel connections of one voltage source and two capacitors to realize nine output levels, thus lower THD can be obtained without HFM methods. The voltage stress on power devices is relatively relieved, which has broadened its range of applications as well. Moreover, proposed nine-level inverter is equipped with the inherent self-voltage balancing ability, thus the modulation algorithm gets simplified. The circuit structure, modulation method, capacitor calculation, loss analysis and performance comparisons are presented in this paper, and all the superior performances of proposed nine-level inverter are verified by simulation and experimental prototypes with rated output power of 200W. The accordance of theoretical analysis, simulation and experimental results confirms the feasibility of proposed nine-level inverter.

 

KEYWORDS:

1.      Nine-level inverter

2.      One voltage source

3.      Two capacitors

4.      Self-voltage balancing

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Circuit of proposed nine-level inverter.

EXPECTED SIMULATION RESULTS:

Fig. 2. Simulation waveforms of driving signals.

Fig. 3. Simulation waveforms of output voltages and currents under different load-types. (a) Ro = 32 . (b) ZL = 24+j20 Ro =24 Lo = 3.2 mHL31.2= 40.

Fig. 4. Simulation waveforms of the staircase output and capacitors’ voltages.

Fig. 5. Simulation waveform of frequency spectrum at fundamental frequency of 1 kHz.

CONCLUSION:

 In this paper, a novel nine-level inverter is proposed for HFAC PDS. Compared with the existing topologies, proposed topology can achieve nine-level staircase output with only one voltage source, fewer power devices and relatively less voltage stress. All these have enlarged its application scopes. Voltage balance problem is avoided by the inherent self-voltage balancing ability, which has simplified the modulation circuits or algorithms, and the lower THD of 3.13% is realized without using HFM methods. As a result, the switching loss is significantly reduced. The capacitor calculation and power loss analysis are conducted in this paper, and the comparisons with existing topologies further testify the superiority of proposed HF inverter. All the merits and the feasibility of proposed topology are evaluated by a simulation model and an experimental prototype with rate power of 200W, and their results illustrate that proposed inverter is a preferable topology to implement HF power source for HFAC PDS.

REFERENCES:

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