Common-Mode Voltage Eliminated Three-Level Inverter using a Three-Level Flying-Capacitor Inverter and Cascaded H-Bridge

ABSTRACT:

This paper proposes a new 3 level common mode voltage eliminated inverter using an inverter structure formed by cascading a H-Bridge with a three-level flying capacitor inverter. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H- Bridge fails, the system can still be operated as a normal 3 level inverter mode at full power. This inverter has many advantages like use of single DC-supply, making it possible for a back to back grid-tied converter application, improved reliability etc.

KEYWORDS:

1.      Common mode voltage elimination

2.       Three level inverter

3.       Multi-level inverter

 SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

        

    

Figure 1. Power circuit for the proposed three level common mode voltage eliminated inverter

EXPECTED SIMULATION RESULTS:

   

Figure.2.Simulation result for testing the capacitor balancing algorithm. V_AO:Pole Voltage(100V/div), I_A:Pole Current(5A/div) VC1:Cap1-Voltage(100V/div), VC2:Cap2-Voltage(50V/div) ,VCM: Common mode voltage(50V/div) Time: 500mS/div.

  

Figure 3. Steady state performance at 10 Hz. VAO: Pole Voltage(100V/div), VAN: Phase Voltage(100V/div), VNO: Neutral point voltage(20V/div)IA:Phase Current(2A/div) T:20mS/div.

Figure 4. Steady state performance at 20 Hz. VAO: Pole Voltage(100V/div), VAN: Phase Voltage(100V/div), VNO: Neutral point Voltage(20V/div)IA: Phase Current(2A/div) T:10mS/div.

                                                           

Figure 5. Steady state performance at 30 Hz. VAO: Pole Voltage(100V/div), V_AN: Phase Voltage(100V/div), VNO: Neutral point Voltage(20V/div)IA: Phase Current(2A/div) T:10mS/div.

                                                                                                    

Figure 6. Steady state performance at 40 Hz. VAO: Pole Voltage(100V/div), V_AN: Phase Voltage(100V/div), VNO: Neutral point (20V/div)IA: Phase Current(2A/div) T:5mS/div.

                                    

Figure 7. Steady state performance at 50 Hz. VAO: Pole Voltage(100V/div), V_AN: Phase Voltage(100V/div), VNO: Neutral point Voltage(200V/div)IA: Phase Current(2A/div) T:5mS/div.

                         

        

Figure 8. Steady State performance at 10 Hz. VAO: Pole Voltage(50V/div), VC1:C1(Vdc/2) Cap voltage(50V/div), VC2: C2-Cap Voltage(50V/div), IA: Phase Current(2A/div), T:10mS/div

                   

Figure 9. Steady State performance at 20 Hz.VAO: Pole Voltage(50V/div), VC1:C1-Cap voltage(50V/div), VC2: C2-Cap Voltage(50V/div), IA: Phase Current(2A/div), T:10mS/div

                              

Figure 10. Steady State performance at 30 Hz.VAO: Pole Voltage(100V/div), VC1:C1-Cap voltage(50V/div), VC2: C2-Cap Voltage(50V/div), IA: Phase Current(2A/div), T:10mS/div

                        

Figure 11. Steady State performance at 40 Hz.VAO: Pole Voltage(100V/div), VC1:C1-Cap voltage(50V/div), VC2: C2-Cap Voltage(50V/div), IA: Phase Current(2A/div), T:10mS/div

                            

Figure 12. Steady State performance at 50 Hz.VAO: Pole Voltage(100V/div), VC1:C1-Cap voltage(50V/div), VC2: C2-Cap Voltage(50V/div), IA: Phase Current(2A/div), T:10mS/div

                            

Figure 13. Acceleration Performance. V_AN: Phase Voltage(100V/div), VC2: C2-Cap Voltage Ripple (2V/div), V_CM: Neutral point voltage (10V/div), I_A: Phase Current(2A/div) T:500mS/div.

                                             

Figure 14. Capacitor Balancing Algorithm Test, V_C1: C1(Vdc/2)Cap voltage, V_C2: C2 (Vdc/4) Cap Voltage, V_CM: Common mode voltage (10V/div) I_A: Phase Current10A/div, T:500mS/div

CONCLUSION:

A three-level common-mode voltage eliminated inverter using five-level inverter formed by cascading a three-level flying capacitor inverter with a H-bridge, was proposed and analyzed. The same was simulated for an induction motor load in Simulink and implemented using IGBT inverter modules. The entire drive structure with the proposed inverter and a three phase Y-connected induction motor was experimentally verified for steady-state operation at various modulation indices. The transient performance during sudden acceleration was also verified. It may be observed that the common mode voltage is negligible even during the switching intervals of the converter. This results in negligible bearing currents and improved life of the bearing. This configuration has reduced number of switches compared to other similar configurations. Another advantage of this topology is the possibility of common-mode voltage elimination using single-ended configuration where the motor windings are fed only from one side. Also, this configuration uses a single DC-supply unlike many other topologies which require multiple isolated supplies. Another important feature of this topology is that if one of the devices in the H-bridge were to fail, the entire configuration could work as a normal three-level inverter at full rated capacity by bypassing the H-Bridge, thereby greatly improving the reliability of the overall system.

 REFERENCES:

[1] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B.Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, “Recent Advances and Industrial Applications of Multilevel Converters,” IEEE Trans. Ind. Electron.,vol. 57, no. 8, pp. 2553–2580, Aug. 2010.

[2] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, “Multilevel voltage-source-converter topologies for industrial medium-voltage drives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930–2945, Dec.2007.

[3] A. Nabae, I. Takahashi, and H. Akagi, “A new neutral-point-clamped PWM inverter,” IEEE Trans. Ind. Appl., vol. IA-17, no. 5, pp. 518–523, Sep. 1981.

[4] T. A. Meynard and H. Foch, “Multi-level conversion: High voltage choppers and voltage-source inverters,” in Proc. IEEE 23rd Annu. Power Electron.Spec. Conf., Jun. 29–Jul. 3, 1992, vol. 1, pp. 397–403.

[5] M. Marchesoni, M. Mazzucchelli, and S. Tenconi, “A non-conventional power converter for plasma stabilization,” in Proc. IEEE 19th Annu. Power Electron. Spec. Conf. (PESC’88) Rec., Apr. 11–14, vol. 1, pp. 122–129.

TS-Fuzzy-Controlled Active Power Filter for Load Compensation

ABSTRACT:

This paper describes the application of Takagi–Sugeno (TS)-type fuzzy logic controller to a three-phase shunt active power filter for the power-quality improvement and reactive power compensation required by a nonlinear load. The advantage of fuzzy logic control is that it does not require a mathematical model of the system. The application of the Mamdani-type fuzzy logic controller to a three-phase shunt active power filter was investigated earlier but it has the limitation of a larger number of fuzzy sets and rules. Therefore, it needs to optimize a large number of coefficients, which increases the complexity of the controller. On the other hand, TS fuzzy controllers are quite general in that they use arbitrary input fuzzy sets, any type of fuzzy logic, and the general defuzzifier. Moreover, the TS fuzzy controller could be designed by using a lower number of rules and classes. Further, in this paper, the hysteresis current control mode of operation is implemented for pulsewidth-modulation switching signal generation. Computer simulation results show that the dynamic behavior of the TS fuzzy controller is better than the conventional proportional-integral (PI) controller and is found to be more robust to changes in load and other system parameters compared to the conventional PI controller.

KEYWORDS:

1.      Dynamic behavior of the controller

2.       Power quality improvement

3.       Shunt active power filter

4.       Takagi–Sugeno (TS) fuzzy logic controller

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

                  

 Fig. 1. Basic compensation principle of APF.

EXPECTED SIMULATION RESULTS:

        

                     

Fig. 2. Source voltage

                                      

Fig. 3. Source current when the compensator is not connected.

                                      

Fig. 4. Source current: PI controller.

                                               

Fig. 5. Source current: TS fuzzy controller

                             

      

Fig. 6. Load current.

                                    

Fig. 7. DC capacitor voltage: load is increased at 0.3 s.

                                 

                    

Fig. 8. Source current: PI controller.

                                               

Fig. 9. Source currents: TS fuzzy controller

                                                   

Fig. 10. Load current.

           

                                     

Fig. 11. DC capacitor voltage: load is reduced at 0.3 s.

                                              

Fig. 12. Source current: PI controller

                                                    

Fig. 13. Source currents: TS fuzzy controller.

                                                   

Fig. 14. THD in source currents.

CONCLUSION:

A TS fuzzy-logic-controlled shunt active power filter has been developed to improve the performance of controller for load compensation. The performance of the TS fuzzy logic controller is compared with the conventional PI controller. The harmonic elimination process is simple, and it is implemented by sensing line currents only. From the simulation results, it is clear that the dc voltage excursion of the TS fuzzy controller is better than the conventional PI controller under various load conditions as well as filter parameter variations. The dc-link voltage settles approximately within two cycles for the large change in load and also the excursion in voltage is less compared to the PI controller. For the changes in filter parameters (and), the performance of the TS fuzzy controller remains the same. Hence, the TS fuzzy controller is quite robust for system parameter variations. The THD of the source current after compensation is well below the permissible limit of 5%. TS fuzzy control is better than the Mamdani type of fuzzy control in the sense that it requires only two numbers of fuzzy sets, four rules, and five numbers of coefficients to be optimized compared to seven fuzzy sets, 49 rules, and 17 coefficients used for the Mamdani type used in [11]. Hence, the TS fuzzy controller is a good candidate for improving the dynamic performance of a compensator and eliminating the harmonics.

REFERENCES:

[1] H. Akagi, Y. Kanazawa, and A. Nabae, “Instantaneous reactive power compensators comprising switching devices without energy storage components,” IEEE Trans. Ind. Appl., vol. IA-20, no. 3, pp. 625–630, May/Jun. 1984.

[2] F. Z. Peng, H. Akagi, and A. Nabae, “Study of active power filters using quad series voltage source PWM converters for harmonic compensation,” IEEE Trans. Power Electron., vol. 5, no. 1, pp. 9–15, Jan. 1990.

[3] W. M. Grady,M. J. Samotyj, and A. H. Noyola, “Survey of active power line conditioning methodologies,” IEEE Trans. Power Del., vol. 5, no. 3, pp. 1536–1542, Jul. 1990.

[4] B. Singh, A. Chandra, and K. Al-Haddad, “Computer-aided modeling and simulation of active power filters,” Elect. Mach. Power Syst., vol. 27, pp. 1227–1241, 1999.

[5] K. Chatterjee, B. G. Fernandes, and G. K. Dubey, “An instantaneous reactive volt-ampere compensator and harmonic suppressor system,” IEEE Trans. Power Electron., vol. 14, no. 2, pp. 381–392, Mar. 1999..

Single-Phase to Three-Phase Universal Active Power Filter

      

ABSTRACT:

In this paper, a universal active power filter is proposed for harmonic and reactive power compensation in the single-phase to three-phase systems. The proposed configuration solves a typical problem found in remote (or rural) applications, where only a single-phase grid is available and there is a demand to supply three-phase loads. A suitable control strategy is presented to regulate the load voltage, the power factor, and to minimize the voltage and current harmonics simultaneously. Simulated and experimental results are also presented.

KEYWORDS:

1.      Active power filter

2.       Harmonic distortion compensation

3.      Reactive power compensation

4.       Single-phase to three-phase conversion

SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:

       

Fig. 1. Conventional configurations. (a) General scheme of the active power filter. (b) Three-phase active power filter. (c) Single-phase active power filter. (d) Single-phase to three-phase converter.

CIRCUIT DIAGRAM:

                   

Fig. 2. Proposed single-phase to three-phase active power filter.

EXPECTED SIMULATION RESULTS:

         

Fig. 3. Experimental results. (a) Voltage and current of the grid (top), dc-link voltage (middle) and load voltages (bottom). (b) Load current (top) and grid current (bottom).

             

Fig. 4. Experimental results in the time (top) and in the frequency (bottom) domains. (a) Grid current. (b) Load current. (c) Grid voltage. (d) Load voltage.

CONCLUSION:

A universal active power filter for harmonic and reactive power compensation in single-phase to three-phase systems was presented. The model of the system was derived, and comparing this kind of solution (single-phase to three-phase universal power filter) with the conventional solution (ac-dc-ac single-phase to three-phase converters) favors the proposed one, in relation to: switches losses minimization and switches power ratings reduction. A suitable control strategy, including the PWM technique, has been developed as well. The experimental results demonstrate the feasibility of the proposed system.

REFERENCES:

[1] Y. W. Li, F. Blaabjerg, D. Vilathgamuwa, and P. C. Loh, “Design and comparison of high performance stationary-frame controllers for DVR implementation,” IEEE Trans. Power Electron., vol. 22, no. 2, pp. 602–612, Mar. 2007.

[2] E.-H. Kim, J.-M. Kwon, J.-K. Park, and B.-H. Kwon, “Practical control implementation of a three- to single-phase online UPS,” IEEE Trans. Ind. Electron., vol. 55, no. 8, pp. 2933–2942, Aug. 2008.

[3] H. Akagi, “Trends in active power line conditioners,” IEEE Trans. Power Electron., vol. 9, no. 3, pp. 263–268, May 1994.

[4] L. Asiminoaei, F. Blaabjerg, and S. Hansen, “Detection is key—harmonic detection methods for active power filter applications,” IEEE Ind. Appl. Mag., vol. 13, no. 4, pp. 22–33, Jul./Aug. 2007.

[5] B. Singh, K. Al-Haddad, and A. Chandra, “A review of active filters for power quality improvement,” IEEE Trans. Ind. Electron., vol. 46, no. 5, pp. 960–971, Oct. 1999.

Seventeen-Level Inverter Formed by Cascading Flying Capacitor and Floating Capacitor H-Bridges

Seventeen-Level Inverter Formed by Cascading Flying Capacitor and Floating Capacitor H-Bridges

ABSTRACT:

A multilevel inverter for generating 17 voltage levels using a three-level flying capacitor inverter and cascaded H-bridge modules with floating capacitors has been proposed. Various aspects of the proposed inverter like capacitor voltage balancing have been presented in the present paper. Experimental results are presented to study the performance of the proposed converter. The stability of the capacitor balancing algorithm has been verified both during transients and steady-state operation. All the capacitors in this circuit can be balanced instantaneously by using one of the pole voltage combinations. Another advantage of this topology is its ability to generate all the voltages from a single dc-link power supply which enables back-to-back operation of converter.

Also, the proposed inverter can be operated at all load power factors and modulation indices. Additional advantage is, if one of the H-bridges fail, the inverter can still be operated at full load with reduced number of levels. This configuration has very low dv/dt and common-mode voltage variation.

KEYWORDS:

1.      Cascaded H-bridge

2.       Flying capacitor

3.       Multilevel inverter

4.       17-level inverter

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

            

       Fig. 1. Block diagram of controller for one phase of the proposed converter.

EXPECTED SIMULATION RESULTS:

         

 Fig. 2. Pole, Phase, capacitor voltages along with current for 10-Hz operation of converter. VAC1(50 V/div),VAO: Pole voltage (100 V/div), VAN: Phase Voltage (100 V/div), VAC4: (100 V/div),VAC3: (10 V/div),VAC2: (25 V/div), IA:2 A/div, Timescale: (20 mS/div).

               

     

Fig.3. Pole, Phase, capacitor voltages along with current for 20-Hz operation of the converter. VAC1: (50 V/div),VAO: Pole voltage(100 V/div), VAN: Phase Voltage (100 V/div), VAC4: (20 V/div),VAC3: (10 V/div),VAC2: (25 V/div), IA:2 A/div, Timescale: 10 mS/div.

              

  

    

Fig.4. Pole, Phase, capacitor voltages along with current for 30-Hz operation of the converter. VAC1:(50 V/div),VAO: Pole voltage(100 V/div),VAN: Phase Voltage (100 V/div), VAC4: (20 V/div),VAC3: (10 V/div),VAC2: (25 V/div), IA:2 A/div, Timescale: 10 mS/div.

                    

     

Fig. 5. Pole, Phase, capacitor voltages along with current for 40-Hz operation of the converter. VAC1:(50 V/div),VAO: Pole voltage(100 V/div),VAN: Phase Voltage (100 V/div), VAC4: (10 V/div),VAC3: (10 V/div),VAC2: (100 V/div), IA:2 A/div, Timescale: 5 mS/div.

                       

      

Fig. 6. Pole, Phase, capacitor voltages along with current during sudden acceleration. VAC1:Cap AC1 voltage(100 V/div), VAO: Pole Voltage(100 V/div), VAN: Phase Voltage(100 V/div),VAC4:Cap AC4 voltage(10 V/div), VAC3:Cap AC3 voltage (20 V/div), VAC2:Cap AC2 voltage (20 V/div),IA: Phase current (2 A/div) Timescale: 500 mS/div.

CONCLUSION:

A new 17-level inverter configuration formed by cascading a three-level flying capacitor and three floating capacitor H-bridges has been proposed for the first time. The voltages of each of the capacitors are controlled instantaneously in few switching cycles at all loads and power factors obtaining high performance output voltages and currents. The proposed configuration uses a single dc link and derives the other voltage levels from it. This enables back-to-back converter operation where power can be drawn and supplied to the grid at prescribed power factor. Also, the proposed 17-level inverter has improved reliability. In case of failure of one of the H-bridges, the inverter can still be operated with reduced number of levels supplying full power to the load. This feature enables it to be used in critical applications like marine propulsion and traction where reliability is of highest concern. Another advantage of the proposed configuration is modularity and symmetry in structure which enables the inverter to be extended to more number of phases like five-phase and six-phase configurations with the same control scheme. The proposed inverter is analyzed and its performance is experimentally verified for various modulation indices and load currents by running a three-phase 3-kW squirrel cage induction motor. The stability of the capacitor balancing algorithm has been tested experimentally by suddenly accelerating the motor at no load and observing the capacitor voltages at various load currents.

REFERENCES:

[1] J. Rodriguez, J.-S. Lai, and F. Z. Peng, “Multilevel inverters: A survey of topologies, controls, and applications,” IEEE Trans. Ind. Appl., vol. 49, no. 4, pp. 724–738, Aug. 2002.

[2] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, “The age of multilevel converters arrives,” IEEE Ind. Electron. Mag., vol. 2, no. 2, pp. 28–39, Jun. 2008.

[3] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B.Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553–2580, Aug. 2010.

[4] A. M. Massoud, S. Ahmed, P. N. Enjeti, and B. W.Williams, “Evaluation of a multilevel cascaded-type dynamic voltage restorer employing discontinuous space vector modulation,” IEEE Trans. Ind. Electron., vol. 57, no. 7, pp. 2398–2410, Jul. 2010.

[5] S. Rivera, S. Kouro, B.Wu, S. Alepuz,M. Malinowski, P. Cortes, and J. R. Rodriguez, “Multilevel direct power control—a generalized approach for grid-tied multilevel converter applications,” IEEE Trans. Power Electron., vol. 29, no. 10, pp. 5592–5604, Oct. 2014.