Model predictive-based shunt active power filter with a new reference current estimation strategy

 ABSTRACT:  

This study presents a new reference current estimation method using proposed robust extended complex Kalman filter (RECKF) together with model predictive current (MPC) control strategy in the development of a three-phase shunt active power filter (SAPF). A new exponential function embedded into the RECKF algorithm helps in the estimation of in phase fundamental component of voltage (vh) at the point of common coupling considering grid perturbations such as distorted voltage, measurement noise and phase angle jump and also for the estimation of fundamental amplitude of the load current (ih). The estimation of these two variables (vh, ih) is used to generate reference signals for MPC. The proposed RECKF-MPC needs less number of voltage sensors and resolves the difficulty of gain tuning of proportional–integral (PI) controller. The proposed RECKF-MPC approach is implemented using MATLAB/SIMULINK and also Opal-RT was used to obtain the real-time results. The results obtained using the proposed RECKF together with different variants of Kalman filters (Kalman filter (KF), extended KF (EKF) and extended complex KF (ECKF)) and PI controller are analysed both in the steady state as well as transient state conditions. From the above experimentation, it was observed that the proposed RECKF-MPC control strategy outperforms over PI controller and other variants of Kalman filtering approaches in terms of reference tracking error, power factor distortion and percentage total harmonic distortion in the SAPF system.

 

SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

 

Fig.1a Proposed RECKF-MPC-based SAPF

 EXPERIMENTAL RESULTS:

 

Fig.2 Capacitor voltage response in SAPF in steady state for KF, EKF, ECKF, RECKF and PI with

a MATLAB b Real-time Opal-RT (voltage scale: 100 V/div, time scale: 10 ms/div), compensating current response in SAPF in steady state for KF, EKF, ECKF, RECKF and PI with c MATLAB d Real-time Opal-RT (current scale: 15 A/div, time scale: 10 ms/div)

 

 

 Fig. 3 Continued

 Fig. 4 Load current response of SAPF in steady state with a MATLAB b Opal-RT (current scale: 12.5 A/div, time

scale: 10 ms/div)

 

 

 Fig. 5 Actual and reference source current response in SAPF in steady state for KF, EKF, ECKF, RECKF and PI with a MATLAB b Real-time Opal-RT (current scale: 12.5 A/div, time scale: 10 ms/div), source voltage and source current after compensation in SAPF in steady state for KF, EKF, ECKF, RECKF and PI with c MATLAB d Real-time Opal-RT (current scale: 25 A/div, time scale: 10 ms/div)

 

 

Fig. 6 Continued

 

Fig. 7 Transient state response in SAPF system for PI and RECKF with MATLAB

a Load current

b Capacitor voltage

c Compensating current

d Source voltage and source current

 Fig. 8 Transient state response in SAPF system for PI and RECKF with real-time Opal-RT

a Load current b Capacitor voltage c Compensating current d Source voltage and source current (for (a), (c) and (d), current scale: 25 A/div and for (b), voltage scale: 125 V/div, time scale: 20 ms/div)

 CONCLUSION:

In this paper, a model predictive-based SAPF with a new reference current estimation scheme has been presented. This scheme exploits the estimation of in phase fundamental component of distorted PCC voltage along with the estimation of fundamental amplitude of load current using KF, EKF, ECKF and proposed RECKF algorithms. The proposed RECKF algorithm is based on applying a new weighted exponential function as a factor to limit the variation of innovation vector, to restrain the unusual measured value and to enhance the estimated accuracy with consideration of grid perturbations such as voltage distortion, measurement noise and phase angle jump. MPC strategy presented in this paper is very simple and powerful and advantageously considers the discrete nature of power converters. In addition, it is not necessary to include any type of modulator and the drive signals for the IGBTs are generated directly by this control. The proposed RECKF-MPC control strategy avoids the use of external linear and non-linear controllers; hence a cheaper control strategy can be implemented while high performance is maintained. The performances of the proposed RECKF-MPC-based SAPF have been verified both in steady state and transient state conditions. The proposed RECKF approach overcomes difficulties encountered with the fixed-gain PI controller, such as flexibility and robustness over stabilisation of capacitor voltage when changing loads.

Determination of current reference and current controller for SAPF is one of the most important issues in improvement of power quality. From the real-time and simulation results, it is observed that RECKF-MPC exhibits excellent tracking performance thus is a better control approach to SAPF design in steady state as well as transient state condition which improves power quality more effectively in terms of efficient harmonics mitigation, power factor improvement and tracking error reduction in presence of above all grid perturbations.

 

REFERENCES:

 1 Grady,W.M., Samotyj, M.J., Noyola, A.H.: ‘Survey of active power line conditioning methodologies’, IEEE Trans. Power Deliv., 1990, 5, pp. 1536–1542

2 Heydt, G.T.: ‘Electric power quality’ (Stars in a Circle, West Lafayette, IN, 1991)

3 Clark, J.W.: ‘AC power conditioners – design, applications’ (Academic, San Diego, CA, 1990)

4 Rastogi, M., Mohan, N., Edris, A.A.: ‘Hybrid-active filtering of harmonic currents in power systems’, IEEE Trans. Power Deliv., 1995, 10, pp. 1994–2000

5 Akagi, H., Kanazawa, Y., Nabae, A.: ‘Instantaneous reactive power compensators comprising switching devices without energy storage components’, IEEE Trans. Ind. Appl., 1984, IA-20, pp. 625–630

Model Predictive Control for Shunt Active Filters With Fixed Switching Frequency

 ABSTRACT:  

This paper presents a modification to the classical Model Predictive Control algorithm, named Modulated Model Predictive Control, and its application to active power filters. The proposed control is able to retain all the advantages of a Finite Control Set Model Predictive Control whilst improving the generated waveforms harmonic spectrum. In fact a modulation algorithm, based on the cost function ratio for different output vectors, is inherently included in the MPC. The cost function based modulator is introduced and its effectiveness on reducing the current ripple is demonstrated. The presented solution provides an effective and straightforward single loop controller, maintaining an excellent dynamic performance despite the modulated output and it is self-synchronizing with the grid. This promising method is applied to the control of a Shunt Active Filter for harmonic content reduction through a reactive power compensation methodology. Significant results obtained by experimental testing are reported and commented, showing that MPC is a viable control solution for active filtering systems.

KEYWORDS:

1.      Smart Grids

2.      Power Quality

3.      Active Filters

4.      Power Filters

5.      Harmonic Distortion

6.      Model Predictive Control

SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:

Fig.1: Schematic diagram of a FCS-MPC.

EXPERIMENTAL RESULTS:

 

(a)

(b)

(c)

              Fig.2: M2PC sensitivity to filter inductance variation: (a) Lf = 2.375mH (b) Lf = 4.75mH (c) Lf = 9.5mH.

 

CONCLUSION:

Power quality regulation is a relevant topic in modern electrical networks. Improving the quality of the delivered energy is an important characteristic in the new smart grids where there is an increasing demand of dynamic, efficient and reliable distribution systems. The use of active filters becomes therefore vital for the reduction of harmonic distortions in the power grid. This paper has presented the development and the implementation of a SAF for harmonic distortion reduction regulated by an improved Modulated Model Predictive Controller.

Based on the system model, it dynamically predicts the values of all the variable of interest in order to obtain a multiple control target optimization by minimizing a user defined cost function. Moreover the higher current ripple typical of MPC has been considerably reduced by introducing a cost function based modulation strategy without compromising the dynamic performances. A SAF prototype implementing the proposed solution was then described, finally reporting and commenting the promising experimental tests results both in transient conditions and steady-state. It was hence demonstrated that FCS-M2PC is a viable and effective solution for control of active power compensators, where different systems variables can be regulated with the aid of only a single control loop, with no need for grid synchronization devices.

 REFERENCES:

[1] P. Salmeron and S. P. Litran, “Improvement of the Electric Power Quality Using Series Active and Shunt Passive Filters,” IEEE Trans. Power Del., vol. 25, no. 2, pp. 1058–1067, 2010.

[2] H. Johal and D. Divan, “Design Considerations for Series-Connected Distributed FACTS Converters,” IEEE Trans. Ind. Appl., vol. 43, no. 6, pp. 1609–1618, 2007.

[3] D. Divan and H. Johal, “Distributed FACTS—A New Concept for Realizing Grid Power Flow Control,” IEEE Trans. Power Electron., vol. 22, no. 6, p. 2253, 2007.

[4] B. Singh, K. Al-Haddad, and A. Chandra, “A review of active filters for power quality improvement,” IEEE Trans. Ind. Electron., vol. 46, no. 5,pp. 960–971, 1999.

[5] M. L. Heldwein, H. Ertl, J. Biela, D. Das, R. P. Kandula, J. A. Munoz, D. Divan, R. G. Harley, and J. E. Schatz, “An Integrated Controllable Network Transformer—Hybrid Active Filter System,” IEEE Trans. Ind. Appl., vol. 51, no. 2, pp. 1692–1701, 2015.

Design and Hardware Implementation Considerations of Modified Multilevel Cascaded H-Bridge Inverter for Photovoltaic System

 ABSTRACT:  

 Inverters are an essential part in many applications including photovoltaic generation. With the increasing penetration of renewable energy sources, the drive for efficient inverters is gaining more and more momentum. In this work, output power quality, power loss, implementation complexity, cost, and relative advantages of the popular cascaded multilevel H-bridge inverter, and a modified version of it are explored. Optimal number of levels, and the optimal switching frequency for such inverters are investigated, and a 5-level architecture is chosen considering the trade-offs. This inverter is driven by level shifted in-phase disposition pulse width modulation technique to reduce harmonics, which is chosen through deliberate testing of other advanced disposition pulse width modulation techniques. To reduce the harmonics further, the application of filters is investigated, and an LC filter is applied which provided appreciable results. This system is tested in MATLAB/Simulink, and then implemented in hardware after design and testing in Proteus ISIS. The general cascaded multilevel H-bridge inverter design is also implemented in hardware to demonstrate a novel low-cost MOSFET driver build for this study. The hardware setups use MOSFETs as switching devices and low-cost ATmega microcontrollers for generating the switching pulses via level shifted in-phase disposition pulse width modulation. This implementation substantiated the effectiveness of the proposed design.

 KEYWORDS:                                                               

 

1.      Inverter

2.      Multilevel Inverter

3.      Cascaded H-Bridge

4.      Modified Cascaded H-Bridge

5.      Advanced PWM Techniques

6.      MOSFET Driving Technique

7.      Level Shifted In-Phase Disposition Pulse Width Modulation

 

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

 

FIGURE 1. (a) General structure of multilevel inverter. Each 4-switch block represents an H-bridge, each equipped with its own DC source. (b) Modified 5 level inverter configuration: this one uses 6 switches instead of the 8 required in the general structure.

 

EXPERIMENTAL RESULTS:

FIGURE 2. Outputs of 5-level general and modified CHB at 2 kHz switching frequency. The general CHB signal quality is better than the modified CHB signal quality because of the presence of non-linearity in the modified design.

 

FIGURE 3. Outputs of 5-level general and modified CHB at 6 kHz switching frequency. The general CHB signal quality is better than the modified CHB signal quality because of the presence of non-linearity in the modified design.

(a)

(b)

FIGURE 4. (a) The filtered and unfiltered output voltage of the modified CHB for 4 kHz PWM switching frequency, and (b) the filtered output current of the modified CHB for 4 kHz PWM switching frequency.

CONCLUSION:

In this work, a single phase modified 5-level symmetric cascaded multilevel H-bridge (CHB) inverter with 6 switches has been presented. This reduction in switches has reduced the cost, complexity, area requirement, and losses, while improving efficiency. The CHB architecture has been chosen over other designs because of its unique advantages. These benefits of CHB- namely, the optimum number of levels in the CHB, and the optimum switching frequency – have been investigated thoroughly. A 7-level CHB with 6 kHz switching frequency has appeared as the best performing system in this study. However, this performance has been achieved for unfiltered outputs. In this paper, an LC filter has been used to reduce THD in the output significantly. When this filter is used, both 5-level and 7-level CHBs have demonstrated almost equal THD levels. Thus the less complex, and hence more practical, 5-level design has been chosen. Also, advanced PWM techniques have been investigated to determine their effectiveness in reducing the THD, and level shifted in-phase disposition PWM technique has been selected to be used in the proposed system as it has provided the best performance. Because of the use of PWM switching, the switching frequency has also been much higher than 7 kHz – which has increased the switching losses, but the resulting reduction in THD has immensely improved the inverter performance. As a result, the increased switching losses can be safely neglected. After obtaining satisfactory simulation results in MATLAB/Simulink, this system has been designed and tested in Proteus for hardware implementation, and then implemented in hardware using MOSFETs and ATmega microcontrollers. The hardware outputs have deviated a bit from the simulation results, and the use of transformers to aid in measurement has been identified as the reason. A use-case of the proposed inverter has also been presented. Future expansion of this work can focus on applying this design in real-life standalone and/or grid-connected PV system.

 REFERENCES:

[1] K. Sano and M. Takasaki, "A transformerless D-STATCOM based on a multivoltage cascade converter requiring no DC sources," IEEE transactions on power electronics, vol. 27, pp. 2783-2795, 2012.

[2] B. Gultekin and M. Ermis, "Cascaded multilevel converter-based transmission STATCOM: System design methodology and development of a 12 kV±12 MVAr power stage," IEEE transactions on power electronics, vol. 28, pp. 4930-4950, 2013.

[3] H. Abu-Rub, J. Holtz, J. Rodriguez, and G. Baoming, "Medium-voltage multilevel converters—State of the art, challenges, and requirements in industrial applications," IEEE Transactions on Industrial Electronics, vol. 57, pp. 2581-2596, 2010.

[4] A. Balikci and E. Akpinar, "A multilevel converter with reduced number of switches in STATCOM for load balancing," Electric Power Systems Research, vol. 123, pp. 164-173, 2015.

[5] J. S. Lee, H. W. Sim, J. Kim, and K. B. Lee, "Combination Analysis and Switching Method of a Cascaded H-Bridge Multilevel Inverter Based on Transformers With the Different Turns Ratio for Increasing the Voltage Level," IEEE Transactions on Industrial Electronics, vol. 65, pp. 4454-4465, 2018.

Design and Simulation of Single-Phase Five-Level Symmetrical Cascaded H-Bridge Multilevel Inverter with Reduces Number of Switches

ABSTRACT:  

Multilevel inverter is an effective and practical solution for increasing power demand and reducing harmonics of ac waveforms. Such inverters synthesize a desired output voltage from several levels of dc voltages as inputs. This paper analyzes the performance of five level cascaded H-bridge multilevel inverter with reduce number of power switches. Further by reducing switches and increasing level will reduce filter cost & harmonic content. 5- Level cascaded H-bridge asymmetrical multilevel inverter topology requires 8 switches but in this new multilevel inverter it requires 6 switches in which same multilevel is obtained. Invariably switching losses and cost also reduced. In this paper only multilevel inverter circuitry will be studied. The performance has been analyzed by the MATLAB/Simulink.

KEYWORDS:

1.      Cascaded multilevel inverter

2.      SPWM

3.      APOD

4.      PD

5.      POD

6.      THD

 

SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:

Figure 1: Multi-user Distributed Massive MIMO transceiver model system.

 

CIRCUIT DIAGRAM:

 

Figure 2: Circuit diagram of 5-level CHB MLI with reduced switches & dc sources.

 

EXPERIMENTAL RESULTS:

 

Figure 3: 5-levels THD in MATLAB tool.

CONCLUSION:

This paper showed that this modified multilevel inverter topology with reduced number of switches can be implemented for industrial drive applications. This multilevel inverter structure and its basic operations have been analyzed. A detailed procedure for calculating required voltage level on each stage has been analyzed. As conventional five-level inverter involves eight switches, it increases switching losses; cost and circuit complexity. This 5-level inverter engages only six switches which reduces switching losses, cost and circuit complexity. Moreover it effectively reduces lower order harmonics. Therefore effective reduction of total harmonics distortion is achieved.

 REFERENCES:

1. http://www.esru.strath.ac.uk

2. Kavita M, Arunkumar A, Gokulnath N, Arun S (2012) New cascaded H-bridge multilevel inverter topology with reduced number of switches and sources. IOSR-JEEE 2: 26-36.

3. Peng FZ, Lai JS (2003) Multilevel converters, A new breed of power Electronics converters. IEEE Trans Ind Appl 32: 509 -517.

4. Rodriguez J, Lai JS, Peng FZ (2003) Multilevel Inverter: A survey topology control and application. IEEE Trans Ind Electro 49: 724-738.

5. Nabae A, Takahashi I, Akagi H (2003) New neutral point clamped pwm inverter. IEEE Trans Ind Appl IA-17: 518-523.

 

Single Phase 21 Level Asymmetric Cascaded Multilevel Inverter With Reduced Number Of Switches And Dc Sources

ABSTRACT:  

Multilevel inverter technology has emerged as a very important alternative in the field of medium and high power industrial drive applications. The emergence of multilevel inverters has been increasing since three decades. These new types of converters are suitable for high voltage and high power application due to their ability to synthesize waveforms with better harmonic spectrum. Several multilevel converter topologies have been developed; i) diode clamped, ii) flying capacitors, and iii) cascaded or H-bridge. Cascade Multilevel Inverter (CMI) is one of the productive topology from multilevel family. By increasing the number of output voltage levels in multilevel inverter the Total Harmonic Distortion (THD) can be minimized. This project proposes a new topology of 21 level asymmetric cascaded multilevel inverter with 11 unidirectional switches and 3 diodes and 4 DC voltages sources. Several Pulse Width Modulation techniques are available, among them Level shifting SPWM techniques such as PO, POD and Space Vector PWM are used and comparison is shown on the basis of THDs obtained. MATLAB/ SIMULINK software is used for simulation

 

SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:

Fig.1. Basic Block Diagram of Proposed Multilevel Inverter

CIRCUIT DIAGRAM:

Fig. 2. Proposed topology

EXPERIMENTAL RESULTS:

Fig.3. Simulation result of 21 level multilevel inverter using PD PWM     

                                      Fig. 4. Simulation result of 21 level multilevel inverter using POD PWM

 

  

Fig. 5. Simulation result of 21 level multilevel inverter   using SVPWM                                                                               

                                                                                    

                      

Fig. .6. Simulation result of Pulses of   Switches in PD PWM

 

Fig. 7.. Simulation result of Pulses of Switches in POD PWM

CONCLUSION:

In this project, a new topology for 21 levels is proposed with reduced number of switches and DC sources. The Proposed circuit is validated on MATLAB/Simulink platform. The simulation of the 21 level asymmetric cascaded multilevel inverter is successfully done using Space vector, Phase disposition and Phase Opposition disposition pulse width modulation techniques. Thus, this new circuit will require lesser hardware space, lesser cost; also the complexity of the circuit will reduce. From the FFT analysis, it is found that PD PWM and POD PWM techniques give least THD. It is observed that even after the reduction in switches and sources, the desired output is obtained.

 

REFERENCES:

[1]             Jannu Ramu, S.J.V. Prakash, K. Satya Srinivasu, R.N.D. Pattabhi Ram, M. Vishnu Prasad and Md. Mazhar Hussain,” Comparison Between Symmetrical And Asymmetrical Single Phase Seven Level Cascade H-Bridge Multilevel Inverter With PWM Topology,” International Journal of Multidisciplinary Sciences and Engineering, Vol . 3, no. 4, April 2012.

[2]             R.Karthikeyan, Dr.S.Chenthur Pandian,” An Efficient Multilevel Inverter System For Reducing THD With Space Vector Modulation,” International Journal of Computer Applications (0975 – 8887),Volume 23– No.2, June 2011.

[3]             Xiaodong Yang, Chonglin Wang, Liping Shi ,Zhenglong Xia,” Generalized Space Vector Pulse Width Modulation Technique For Cascaded Multilevel Inverters,” International Journal of Control and Automation, Vol.7, No.1 (2014), pp.11-26

[4]             Balamurugan M.,Gnana Prakash M.,Umashankar S.,” A New Seven Level Symmetric Inverter With Reduced Number Of Switches And Dc Sources,” Advances in Electrical Engineering (ICAEE), 2014 International Conference.

[5]             Elyas Zamiri.,Sajjad Hamkari.,Ebrahim Babaei.,” A New Cascaded Multilevel Inverter Structure With Less Number Of Switches,” 5th Power Electronics, Drive systems and Technologies Conference, 2014 .