Packed E-Cell (PEC) Converter TopologyOperation and Experimental Validation

ABSTRACT:

 

This paper proposes a novel single-dc-source multilevel inverter called Packed E-Cell (PEC) topology to achieve nine levels with noticeably reduced components count, while dc capacitors are actively balanced. The nine-level PEC (PEC9) is composed of seven active switches and two dc capacitors that are shunted by a four-quadrant switch to from the E-cell, and it makes use of a single dc link. With the proper design of the corresponding PEC9 switching states, the dc capacitors are balanced using the redundant charging/discharging states. Since the shunted capacitors are horizontally extended, both capacitors are simultaneously charged or discharged with the redundant states, so only the auxiliary dc-link voltage needs to be sensed and regulated to half of the input dc source voltage, and consequently, dc capacitors' voltages are inherently balanced to one quarter of the dc bus voltage. To this end, an active capacitor voltage balancing integrated to the level-shifted half-parabola carrier PWM technique has been designed based on the redundant charging/discharging states to regulate the dc capacitors voltages of PEC9. Furthermore, using the E-cell not only reduces components count but also the proposed topology permits multi ac terminal operation. Thus, Five-level inverter operation can be achieved during the four-quadrant switch fault, which confers to the structure high reliability. The theoretical analysis as well as the experimental results are presented and discussed, showing the basic operation, multi-functionality, as well as the superior performance of the proposed novel PEC9 inverter topology.

 KEYWORDS:

 

1.      Nine-level Packed E-Cell (PEC)

2.      Single-dc source inverter

3.      Single auxiliary dc-link capacitors

4.       Multilevel converter

5.      PUC converter

6.       Active rectifier

7.      Active filter

8.      Grid-connected converter

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

In this paper, a novel nine-level single-DC source Packed E-Cell (PEC9) topology has been introduced as a promising candidate for single-phase inverter suitable for symmetrical and asymmetrical series of connection. The presented structure is indeed an optimized compact design topology which permits the reduction of auxiliary DC-link and components count by using E-Cell type of connection. Moreover, by horizontal extension of auxiliary DC-link, in the form of E-Cells, simultaneous charging or discharging with redundant state are achieved that guarantees floating capacitors voltage balancing under all operating conditions. An active voltage balancing algorithm was integrated to the half parabola carrier PWM based technique to efficiently regulate floating capacitors voltages. It was also demonstrated that different output stepped voltage waveforms are achievable without changing in converter circuit design. The presented experimental results of PEC9 validated its reliable performance in keeping capacitors voltages balanced under different load and source conditions that can emerge as a competitive topology for various industrial standalone and grid-tied applications.

REFERENCES:

[1] M. Norambuena, S. Kouro, S. Dieckerhoff, and J. Rodriguez, ``Reduced multilevel converter: A novel multilevel converter with a reduced number of active switches,'' IEEE Trans. Ind. Electron., vol. 65, no. 5, pp. 3636_3645, May 2018.

[2] H. Vahedi, A. A. Shojaei, L.-A. Dessaint, and K. Al-Haddad, ``Reduced DC-link voltage active power _lter using modi_ed PUC5 converter,'' IEEE Trans. Power Electron., vol. 33, no. 2, pp. 943_947, Feb. 2018.

[3] H. Aburub, J. Holtz, and J. Rodriguez, ``Medium-voltage multilevel converters-state of the art, challenges, and requirements in industrial applications,'' IEEE Trans. Ind. Electron, vol. 57, no. 8, pp. 2581_2596, Dec. 2010.

[4] N. Arun and M. M. Noel, ``Crisscross switched multilevel inverter using cascaded semi-half-bridge cells,'' IET Power Electron., vol. 11, no. 1, pp. 23_32, Jan. 2017.

[5] E. Babaei and S. Laali, ``Optimum structures of proposed new cascaded multilevel inverter with reduced number of components,'' IEEE Trans. Ind. Electron., vol. 62, no. 11, pp. 6887_6895, Nov. 2015.

Modified Multilevel Inverters with Reduced Structures Based on Packed U-Cell

 ABSTRACT:

 Multilevel inverters are capable of generating high-quality staircase pseudo-sinusoidal voltage waveform with low THD. These types of topologies may require large number of switches and power supplies. This leads to higher cost and volume of the converter along with complicated control algorithms. Recently, a branch of multilevel converters is emerged as compact power conversion units, in which their ‘reduced-structure’ topologies use lower number of active and passive devices compared with the available topologies. Packed U-Cell, a new reduced-structure multilevel converter, has been recently reported in the literature to reduce component count. Packed U-Cell requires lesser active switches as compared to the existing counterparts. However, there are some drawbacks associated with this topology such as restricted maximum output voltage, high voltage stress on switches, and limited performance to low voltage applications. Available literature present generalization of the topology with special asymmetrical source-ratio, but no sufficient and effective investigations have been made for modified structures or other symmetrical or asymmetrical source-ratio with cascaded configurations. In this paper, the issues associated with PUC are addressed and two approaches as remedy are presented. The first approach presents a comprehensive analysis of cascaded topologies with the proposed basic units, and the second approach is related to a new modified configuration on the basis of the conventional converter for improving the performance of the PUC in terms of total blocking voltage, switch ratings and extending its performance to high voltage applications. Moreover, design of a novel 49-level modified structure and 147-level cascade inverter based on conventional PUC are analyzed under optimal number of DC sources and power switches to get the best possible topology as a solution. Finally, experimental validations were performed by implementing laboratory prototypes.

KEYWORDS:

 

1.      Asymmetrical DC Sources

2.      Multilevel inverter

3.      Modified structure

4.      Packed U-Cell

5.      Reduced structures

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:   

In this paper different drawbacks associated with a newly introduced multilevel converter, named as Packed U-Cell (PUC), such as restricted maximum output voltage, high voltage stress on switches, and limited performance to low voltage applications, are presented. For solving these drawbacks, no sufficient investigations in literature have been made as modified structures or other symmetrical or asymmetrical cascaded configurations. The motivation for conducting this study is to achieve more voltage levels with reduction in the number of power electronics components with lower ratings and blocking voltages, and extending its performance to high voltage applications, using cascaded (approach 1) or modified (approach 2) structures. In the first approach, analysis showed that with using only two DC sources in each cascaded module (..=2), the CAPUC1 and CAPUC2 generate the maximum number of voltage levels with a fixed number of DC sources and switches. Using more than two DC sources in each module, the CAPUC1 generates more voltage levels. Consequently, the CAPUC1 has the optimal structure among all discussed cascade structures. In the second one, the proposed modified structure can improve conventional PUC performance based on power switch ratings for high power applications. Design of a 147-level cascade inverter (based on the CAPUC1) and a novel 49-level modified structure are analyzed under optimal number of DC sources and power switches. Finally, experimental validations were performed by implementing laboratory prototypes. Experimental results in steady state and dynamics conditions showed that the proposed structures can generate output voltage with the lowest THD and highest controllability.

REFERENCES:

[1] H. Akagi, "Classification, Terminology, and Application of the Modular Multilevel Cascade Converter (MMCC)," in IEEE Transactions on Power Electronics, vol. 26, no. 11, pp. 3119-3130, Nov. 2011.

[2] S. Kouro et al., "Recent Advances and Industrial Applications of Multilevel Converters," in IEEE Transactions on Industrial Electronics, vol. 57, no. 8, pp. 2553-2580, Aug. 2010.

[3] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt and S. Kouro, "Multilevel Voltage-Source-Converter Topologies for Industrial Medium-Voltage Drives," in IEEE Transactions on Industrial Electronics, vol. 54, no. 6, pp. 2930-2945, Dec. 2007.

[4] H. Abu-Rub, J. Holtz, J. Rodriguez and G. Baoming, "Medium-Voltage Multilevel Converters—State of the Art, Challenges, and Requirements in Industrial Applications," in IEEE Transactions on Industrial Electronics, vol. 57, no. 8, pp. 2581-2596, Aug. 2010.

[5] X. Zha, L. Xiong, J. Gong and F. Liu, "Cascaded multilevel converter for medium-voltage motor drive capable of regenerating with part of cells," in IET Power Electronics, vol. 7, no. 5, pp. 1313-1320, May 2014.

Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count

 ABSTRACT:

 The inceptions of multilevel inverters (MLI) have caught the attention of researchers for medium and high power applications. However, there has always been a need for a topology with a lower number of device count for higher efficiency and reliability. A new single-phase MLI topology has been proposed in this paper to reduce the number of switches in the circuit and obtain higher voltage level at the output. The basic unit of the proposed topology produces 13 levels at the output with three dc voltage sources and eight switches. Three extentions of the basic unit have been proposed in this paper. A detailed analysis of the proposed topology has been carried out to show the superiority of the proposed converter with respect to the other existing MLI topologies. Power loss analysis has been done using PLECS software, resulting in a maximum ef_ciency of 98.5%. Nearest level control (NLC) pulse-width modulation technique has been used to produce gate pulses for the switches to achieve better output voltage waveform. The various simulation results have been performed in the PLECS software and a laboratory setup has been used to show the feasibility of the proposed MLI topology.

KEYWORDS:

1.      DC - AC converter

2.      Multilevel inverter

3.      Reduce switch count

4.       Nearest level control (NLC)

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:   

The paper presents a novel MLI topology with multiple exten- sion capabilities. The basic unit of the proposed topology produces 13 levels using eight unidirectional switches and three dc voltage sources. Three different extension of the basic unit has been proposed. The performance analysis of the basic unit of the proposed topology has been done and the comparative results with some recently proposed topologies in literature have been presented in the paper. Further, a power loss analysis of the dynamic losses (switching and conduction) in the MLI has also been presented, which gives the maximum efficicnecy of the basic unit as 98.5%. The power loss distribution in all the switches for different combination of loads have also been demonstrated in the paper. The performance of the proposed topology has been simulated with dynamic modulation indexes and different combination of loads using PLECS software. A prototype of the basic unit has been developed in the laboratory and the simulation results have been validated using the different expriemntal results considering different modulation indexes.

REFERENCES:

[1] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B.Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, ``Recent advances and industrial applications of multilevel converters,'' IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553_2580, Aug. 2010.

[2] H. Aburub, J. Holtz, and J. Rodriguez, ``Medium-voltage multilevel converters-state of the art, challenges, and requirements in industrial applications,'' IEEE Trans. Ind. Electron, vol. 57, no. 8, pp. 2581_2596, Dec. 2010.

[3] H. Akagi, ``Multilevel converters: Fundamental circuits and systems,'' Proc. IEEE, vol. 105, no. 11, pp. 2048_2065, Nov. 2017.

[4] J. I. Leon, S. Vazquez, and L. G. Franquelo, ``Multilevel converters: Control and modulation techniques for their operation and industrial appli- cations,'' Proc. IEEE, vol. 105, no. 11, pp. 2066_2081, Nov. 2017.

[5] J. Venkataramanaiah, Y. Suresh, and A. K. Panda, ``A review on symmet- ric, asymmetric, hybrid and single DC sources based multilevel inverter topologies,'' Renew. Sustain. Energy Rev., vol. 76, pp. 788_812, Sep. 2017.

Fast Sensor-Less Voltage Balancing and Capacitor Size Reduction in PUC5 Converter Using Novel Modulation Method

ABSTRACT:

 This paper proposes a novel sensor-less switching method based on logic gates for five-level packed U-cell (PUC5) converter. It comprises only two level-shifted triangular carriers and logic gates. Hence, the number of triangular carriers is halved and the switching states table is eliminated, which cause remarkable reduction in complexity of the proposed modulation method. Moreover, employing the proposed sensor-less switching method leads to decrease in the PUC5 capacitor value by factor of carrier ratio, fast self-balancing of the PUC5 capacitor voltage, and halving the output LC filter inductor and capacitor values in stand-alone mode as well as the grid link inductor value in grid connected mode. In addition, the PUC5 converter start-up transient time is considerably decreased and the first switching harmonic cluster frequency is doubled, which lead to notable improvement of steady-state and dynamic performance of the PUC5 converter. The proposed sensor-less switching method has been implemented in both stand-alone and grid-connected operating modes of PUC5 converter. Provided simulation and experimental results verify the feasibility and effectiveness of the proposed sensor-less switching method as well as its improved dynamic and steady state performances in both stand-alone and grid-connected modes.

KEYWORDS:

 

1.      Capacitor size reduction

2.      Logic gate based modulation method

3.      Multilevel inverter

4.      Packed U-cell (PUC)

5.      Sensor-less control

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:  

In this paper, a novel sensor-less switching method based on logic gates was proposed for PUC5 converter. It comprises only two level shifted triangular carriers and logic form equations and does not have switching states table. Hence, the proposed method does not compel complex calculations and can be easily implemented on low-cost microcontrollers. By utilizing the proposed sensor-less modulation method, the charging and discharging of capacitor is balanced in each switching period, which causes fast self-balancing of the PUC5 capacitor voltage. Moreover, employing the proposed sensor-less switching method leads to decrease the PUC5 capacitor value by factor of carrier ratio ( 0 SW C F R F = ), and halving the output LC filter inductor and capacitor sizes in stand-alone mode as well as the grid link inductor size in gridconnected mode. In addition, the PUC5 converter start-up transient time is considerably decreased and the first switching harmonic cluster frequency is doubled, which lead to notable improvement of steady-state and dynamic performance of PUC5 converter. The proposed sensor-less switching method has been evaluated for both stand-alone and grid-connected modes. An external current controller has been used to control the injected active and reactive power to the grid. Provided simulation and experimental results for stand-alone and gridconnected gridconnected modes verify the feasibility and effectiveness of the proposed sensor-less switching method as well as its improved dynamic and steady state performance.

REFERENCES:

[1] J. Li, S. Bhattacharya, and A. Q. Huang, "A New Nine-Level Active NPC (ANPC) Converter for Grid Connection of Large Wind Turbines for Distributed Generation," IEEE Trans. Power Electron., vol. 26, pp. 961-972, 2011.

[2] M. Abarzadeh, H. M. Kojabadi, and L. Chang, "A Modified Static Ground Power Unit Based on Novel Modular Active Neutral Point Clamped Converter," IEEE Trans. Ind. Appl., vol. 52, pp. 4243-4256, 2016.

[3] M. Abarzadeh, H. M. Kojabadi, F. Deng, and Z. Chen, "Enhanced static ground power unit based on flying capacitor based h-bridge hybrid active-neutral-point-clamped converter," IET Power Electron., vol. 9, pp. 2337-2349, 2016.

[4] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. Wu, et al., "Recent Advances and Industrial Applications of Multilevel Converters," IEEE Trans. Ind. Electron., vol. 57, pp. 2553-2580, 2010.

[5] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, "Multilevel Voltage-Source-Converter Topologies for Industrial Medium-Voltage Drives," IEEE Trans. Ind. Electron., vol. 54, pp. 2930-2945, 2007.

Evaluation of Level-Shifted and Phase-Shifted PWM Schemes for Seven Level Single-Phase Packed U Cell Inverter

 ABSTRACT:

 An evaluation of level shifted and phase shifted triangular and sawtooth carrier modulation schemes for a seven level packed U cell (PUC) inverter is presented in this paper. The investigated PUC is the recently introduced topology for multilevel inverter having reduced switch count in comparison to the conventional topologies of multilevel inverters. The PUC inverter has six switches for 7 level inverter which is very less in comparison to the conventional topologies. In this paper, the level-shifted pulse width modulation (LS-PWM) and phase-shifted PWM (PS-PWM) for triangular and sawtooth carrier are presented and compared. A comparative harmonic analysis for all the cases is performed and results are presented in the paper. The difference in harmonics of the two modulation methods given by the theoretical approach for both the carrier is validated by the experimental results. DC voltage controller and load current controller of the PUC inverter are also designed and presented. The investigated PUC topology is tested in dynamic and steady state conditions and results obtained are presented. The analysis is done and validated using simulation in MATLAB® Simulink environment and experimental approaches using FPGA platform.

KEYWORDS:

1.      Level shift

2.       Multilevel inverter

3.       Modulation

4.      Phase shift

5.       PI controller

6.      PUC inverter

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:  

The paper has presented the comparison of different PWM schemes which can be applied to the PUC inverter. Investigating the suitable modulation schemes is very essential with respect to local grid integration, as the power quality is directly dependent on THD. Triangular carrier based PWM schemes is exhibiting the better result than the sawtooth carrier based PWM schemes as the triangular level shifted carrier PWM scheme is better as compared to sawtooth level shifted carrier because in triangular level shifted carrier both edges (falling and rising) of pulses are modulated which improves the harmonic spectrum. However, in the sawtooth level shifted carrier only rising edges are modulated. Hence triangular level shifted carrier PWM scheme can be applied for integrating the PUC inverter with PV and local grid systems. Triangular level shifted carrier PWM scheme for PUC inverter has been suggested based on observing the THD in voltage and current which are respectively just 17.92% and 2.43%. The whole system i.e. solar panel, boost converter with PUC inverter will be very cost effective, besides having good  reliability and power quality as it has the minimum number of power electronics devices compared to previously introduced multilevel inverter topologies. With reduced number of capacitors and power switches seven levels of voltages have been achieved for PUC inverter.

REFERENCES:

[1] F. A. Rahman, M. M. A. Aziz, R. Saidur, W. A. A. Bakar, M. R. Hainin, R. Putrajaya, and N. A. Hassan, “Pollution to solution: Capture and sequestration of carbon dioxide (CO2) and its utilization as a renewable energy source for a sustainable future”, Renewable and Sustainable Energy Reviews,vol. 71, pp. 112-126, May 2017.

[2] Y. Yang, A. Sangwongwanich, and F. Blaabjerg, “Design for reliability of power electronics for grid-connected photovoltaic systems,” in CPSS Transactions on Power Electronics and Applications, vol. 1, no. 1, pp. 92-103, Dec. 2016..

[3] J. Rodriguez, J.-S. Lai, and F. Z. Peng, “Multilevel inverters: a survey of topologies, controls, and applications,” Industrial Electronics, IEEE Transactions on, vol. 49, pp. 724-738, 2002.

[4] Q. M. Attique, Y. Li, and K. Wang, “A survey on space-vector pulse width modulation for multilevel inverters,” in CPSS Transactions on Power Electronics and Applications, vol. 2, no. 3, pp. 226-236, Sept. 2017.

[5] Z. Mohzani, B. P. McGrath, and D. G. Holmes, “A generalized natural balance model and balance booster filter design for three-level Neutral- Point-Clamped converters,” in IEEE Transactions on Industry Applications, vol. 51, no. 6, pp. 4605-4613, Nov.-Dec. 2015.

Design of a Proportional Resonant Controller for Packed U Cell 5 Level Inverter for Grid-Connected Applications

 ABSTRACT:

 In this paper, the design of a proportional resonant (PR) controller for the packed U cell (PUC) 5 level inverter is presented. The objective of the presented work is to present a better solution for current control in grid connected application of the investigated topology. A suitable LCL filter is designed along with the PR control scheme for grid connection. Simulation is performed in MATLAB®/Simulink simulation environment and the theoretical as well as simulation results are validated through experimental results. The simulation results shown in the paper includes both the steady state and the dynamic conditions. The key equations, block diagram, simulation results and experimental results are shown and discussed in the paper.

 KEYWORDS:

1.      Packed U Cell

2.       Proportional Resonant Controller

3.      Multi Level Inverter

4.      Grid Connected

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:  

The paper has discussed the design of a proportional resonant controller for packed U cell 5 level inverter for grid-connected applications. First the theoretical analysis has been done in the paper and the same is verified by the simulation results which is further validated by the experimental results. It can be observed that the THD is very minimal and follows the IEEE standards. The single phase 5 level PUC inverter can be extended to 3 phase and 5 phase PUC inverter in the future for connection to the 3 phase grid and 5 phase motor drives application. The control algorithm can be developed in future for integration with the 3 phase grid and 5 phase motor drives application as discussed above.

REFERENCES:

[I] L. Hadjidemetriou, E. Kyriakides and F. Blaabjerg, "A Robust Synchronization to Enhance the Power Quality of Renewable Energy Systems," in IEEE Transactions on Industrial Electronics, vol. 62, no. 8, pp. 4858-4868, Aug. 2015 ..

[2] F. Blaabjerg, Zhe Chen and S. B. Kjaer, "Power electronics as efficient interface in dispersed power generation systems," in IEEE Transactions on Power Electronics, vol. 19, no. 5, pp. 1184-1194, Sept. 2004.

[3] 1. Rodriguez, J ih-Sheng Lai and Fang Zheng Peng, "Multilevel inverters: a survey of topologies, controls, and applications," in IEEE Transactions on Industrial Electronics, vol. 49, no. 4, pp. 724-738, Aug 2002.

[4] A. Tariq, M. A Husain, M. Ahmad and M. Tariq, "Simulation and study of a grid connected multilevel converter (MLC) with varying DC input," Environment and Electrical Engineering (EEEiC), 2011 10^th international Conference on, Rome, 2011 , pp. 1-4.

[5] K. K. Gupta, A Ranjan, P. Bhatnagar, L. K. Sahu and S. Jain, "Multilevel Inverter Topologies With Reduced Device Count: A Review," in Feee Transactions on Power Electronics, vol. 31, no. I, pp. 135-151 , Jan. 2016.

Artificial Neural Network for Control and GridIntegration of Residential Solar Photovoltaic Systems

ABSTRACT:

 Residential solar photovoltaic (PV) energy is becoming an increasingly important part of the world's renewable energy. A residential solar PV array is usually connected to the distribution grid through a single-phase inverter. Control of the single-phase PV system should maximize the power output from the PV array while ensuring overall system performance, safety, reliability, and controllability for interface with the electricity grid. This paper has two main objectives. The first objective is to develop an artificial neural network (ANN) vector control strategy for a LCL-filter based single-phase solar inverter. The ANN controller is trained to implement optimal control, based on approximate dynamic programming. The second objective is to evaluate the performance of the ANN-based solar PV system by (a) simulating the PV system behavior for grid integration and maximum power extraction from solar PV array in a realistic residential PV application and (b) building an experimental solar PV system for hardware validation. The results demonstrate that a residential PV system using the ANN control outperforms the PV system using the conventional standard vector control method and proportional resonant control method in both simulation and hardware implementation. This is also true in the presence of noise, disturbance, distortion, and non-ideal conditions.

KEYWORDS:

 

1.      Artificial neural networks

2.      DC-AC power converters

3.       DC-DC power converters

4.      Dynamic programming

5.      Maximum power point tracker

6.      Optimal control

7.      Solar power generation

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

This paper proposes a single-phase, residential solar PV system based on artificial neural networks and adaptive dynamic programming for MPPT control and grid integration of a solar photovoltaic array through an LCL-filter based inverter. The proposed artificial neural network controller implements the optimal control based on the approximate dynamic programming. Both the simulation and hardware experiment results demonstrate that the solar PV system using the ADP-based artificial neural network controller has more improved performance than that using the proportional resonant or conventional standard vector control techniques, such as no requirement for damping resistance, more reliable and efficient extraction of solar power, more stable DC-link voltage, and more reliable integration with the utility grid. Using the ADP-based neural network control technique, the harmonics are significantly reduced and the system shows much stronger adaptive ability under uncertain conditions, which would greatly benefit the integration of small-scale residential solar photovoltaic systems into the grid.

REFERENCES:

[1] Renewable Energy World Editors. (2014, Nov. 12). Residential Solar Energy Storage Market Could Approach 1 GW by 2018. Available: http://www.renewableenergyworld.com.

[2] R. A. Mastromauro, M. Liserre and A. D. Aquila, “Control Issues in Single-Stage Photovoltaic Systems: MPPT, Current and Voltage Control”, IEEE Trans. Ind. Informatics, vol. 8, no. 2, pp. 241-254, May 2012.

[3] E. Lorenzo, G. Araujo, A. Cuevas, M. Egido, J. Miñano and R. Zilles, Solar Electricity: Engineering of Photovoltaic Systems, Progensa, Sevilla, Spain, 1994.

[4] J. M. Carrasco, L. G. Franquelo, J. T. Bialasiewicz, E. Galván, R. C. P. Guisado, M. Á. M. Prats, J. I. León, and N. Moreno-Alfonso, “Power- Electronic Systems for the Grid Integration of Renewable Energy Sources: A Survey”, IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 1002-1016, August 2006.

[5] W. T. Franke, C. Kürtz and F. W. Fuchs, "Analysis of control strategies for a 3 phase 4 wire topology for transformerless solar inverters," in Proc. IEEE Int. Symp. Ind. Electron., Bari, pp. 658-663, 2010.