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Thursday 31 January 2019

Investigation on cascade multilevel inverter with symmetric, asymmetric, hybrid and multi-cell configurations



 ABSTRACT:  
In recent past, numerous multilevel architectures came into existence. In this background, cascaded multilevel inverter (CMLI) is the promising structure. This type of multilevel inverters synthesizes a medium voltage output based on a series connection of power cells which use standard low-voltage component configurations. This characteristic allows one to achieve high-quality output voltage and current waveforms. However, when the number of levels increases switching components and the count of dc sources are also increased. This issue became a key motivation for the present paper. The present paper is devoted to investigate different types of CMLI which use less number of switching components and dc sources and finally proposed a new version of Multi-cell based CMLI. In order to verify the proposed topology, MATLAB – simulations and hardware verifications are carried out and results are presented.
KEYWORDS:
1.      Cascade multilevel inverter
2.      Multi-cell
3.      Switching components
4.      High quality output voltages

SOFTWARE: MATLAB/SIMULINK

 INVESTIGATION ON CASCADE MULTILEVEL INVERTER:


Figure 1 (a) CHB multilevel inverter, (b) key waveform for seven-level inverter, (c) CHB multilevel inverter by employing single-phase transformers, (d) simulation verification of seven-level CHB multilevel inverter, (e) FFT spectrum.



Figure 2 (a) Asymmetrical thirteen-level CHB inverter, (b) simulation verification of thirteen-level CHB multilevel inverter, (c) FFT spectrum.


Figure 3 (a) Asymmetrical CHB multilevel inverter, (b) output voltages of each H-bridge module, (c) twenty-seven level output voltage waveform, (d) FFT spectrum.


Figure 4 (a) Asymmetrical CHB multilevel inverter using sub-cells, (b) output voltage of sub-cells, (c) thirty-one level output voltage waveform, (d) FFT spectrum.


Figure 5 (a) Hybrid CHB multilevel inverter, (b) output voltage of each H-bridge and load voltage (nine-level) waveform, (c) FFT spectrum.

Figure 6 (a) Hybrid multilevel inverter using traditional inverter, (b) output voltage waveform, (c) FFT Spectrum.


Figure 7 The proposed multi-cell CMLI.


.
Figure 8 (a) The proposed 25-level asymmetric multi-cell CMLI, (b) key waveforms.



Figure 9 (a) Output voltage of first H-bridge, (b) output voltage of second H-bridge, (c) resultant output voltage with 25-levels, (d) FFT spectrum.

CONCLUSION:

In this paper CMLI with sub-cells is proposed with less number of switches. To highlight the merits of proposed inverter, an in-depth investigation is carried out on symmetric, asymmetric and hybrid multilevel inverters based on CHB topologies. Symmetric configuration has capacity to produce only limited number of levels in output voltage. On the counter side, symmetrical configuration can be operated in asymmetrical mode with different DC sources. However, asymmetrical configurations can produce higher number of output levels and thereby qualitative output waveforms could be generated. Later, hybrid CHB inverters are also introduced, which utilizes single DC source for entire structure. Thus complexity and voltage balancing issues can be reduced. Finally proposed inverter is introduced with less number of switching components and able to produce qualitative output waveforms. To verify the proposed inverter adequate simulation is done with help of MATLAB simulink. Later on, hardware variations are carried out in laboratory. Verifications are quite impressive with greater number of levels in the output voltage and lower harmonic content in FFT spectrums. Spectrums indicate that, low order harmonics are drastically reduced. Thus power quality is significantly enhanced. Thus proposed inverter shows some promising attributes when compared with traditional CHB based architectures.
REFERENCES:
[1] Babaei E, Alilu S, Laali S. A new general topology for cascaded multilevel inverters with reduced number of components based on developed H-bridge. IEEE Trans Ind Electron 2014;61(8):3932–9.
[2] Malinowski Mariusz, Gopakumar K, Rodriguez Jose, Pe´rez Marcelo A. A survey on cascaded multilevel inverters. IEEE Trans Ind Electron 2010;57(7):2197–205.
[3] Wu JC, Wu KD, Jou HL, Xiao ST. Diode-clamped multi-level power converter with a zero-sequence current loop for three-phase three-wire hybrid power filter. Elsevier J Electr Power Syst Res2011;81(2):263–70.
[4] Khoucha Farid, Lagoun Mouna Soumia, Kheloui Abdelaziz, Benbouzid Mohamed El Hachemi. A comparison of symmetrical and asymmetrical three-phase H-bridge multilevel inverter for DTC induction motor drives. IEEE Trans Energy Convers 2011;26(1):64–72.
[5] Ebrahimi J, Babaei E, Gharehpetian GB. A new topology of cascaded multilevel converters with reduced number of components for high-voltage applications. IEEE Trans Power Electron 2011;26(11):3119–30.