ABSTRACT:
This
paper proposes a novel three-phase topology with a reduced component count for
low- and medium-voltage systems. It requires three bidirectional switches and
twelve unidirectional switches for producing four-level voltages without using
flying capacitors or clamping diodes, reducing the size, cost, and losses.
Removing flying capacitors and clamping diodes allows it to simplify control
algorithms and increase the reliability, efficiency, and lifetime. A modified
low-frequency modulation (LFM) scheme is developed and implemented on the
proposed topology to produce a staircase voltage with four steps. Further, a
level-shifted pulse width modulation (LSPWM) is used to reduce the filter size
and increase the output voltage controllability. In this study, a voltage
balancing control algorithm is executed to balance the DC-link capacitor
voltages. The performance of the proposed topology is numerically demonstrated
and experimentally validated on an in-house test setup. Within the framework,
the power loss distribution in switches and conversion efficiency of the
proposed circuit are studied, and its main features are highlighted through a
comparative study.
KEYWORDS:
1. DC-AC
converters
2. Four-level
inverters
3. Low
and medium voltage applications
4. Multilevel
inverters
5. Three-phase
inverters
SOFTWARE: MATLAB/SIMULINK
SCHEMATIC DIAGRAM:
Figure 1. The Proposed Four-Level
Topology. (A) Multiple Sources Configuration (Msc), Recommended For Energy
Systems, (B) Single Source Configuration (Ssc), Recommended For Industrial
Applications.
EXPECTED SIMULATION RESULTS:
Figure 2. Pole Voltages Va0, Vb0, And Vc0 Using
Lfm (A) Simulation,
Figure 3. Pole Voltages Va0, Vb0, And Vc0 Using
Lspwm (A) Simulation,
Figure 4. Line Voltages Vab, Vbc, And Vca Using
Lfm (A) Simulation,
Figure 5. Line Voltages Vab, Vbc, And Vca Using
Lspwm (A) Simulation,
Figure 6. Obtained Vab, Van, And Ian When Feeding
R-Load (A) Simulation(C) Simulation (Lspwm),
Figure 7. Obtained Vab, Van, And Ian For R-L Load
Using Lfm (A) Simulation,
Figure 8. Obtained Vab, Van, And Ian For R-L Load
Using Lspwm (A) Simulation,
CONCLUSION:
This
paper proposes a novel inverter topology with a reduced component count, being
attractive in low- and medium-voltage applications. The proposed circuit
generates four voltage levels without requiring flying capacitors or clamping
diodes, reducing the size, cost, control complexity of the inverter and
enhancing its reliability and lifetime. Several simulation and experimental
tests were presented to validate the proposed topology performance at resistive
and inductive loads. The proposed inverter was compared with the recently
developed four-level topologies to highlight its merits. Moreover, its
conversion efficiency was analysed when varying the switching frequency,
modulation schemes, and loads.
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