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Tuesday, 6 July 2021

A New Multilevel Inverter Topology With Reduce Switch Count

 ABSTRACT:

Multilevel inverters are a new family of converters for dc_ac conversion for the medium and high voltage and power applications. In this paper, two new topologies for the staircase output voltage generations have been proposed with a lesser number of switch requirement. The first topology requires three dc voltage sources and ten switches to synthesize 15 levels across the load. The extension of the first topology has been proposed as the second topology, which consists of four dc voltage sources and 12 switches to achieve 25 levels at the output. Both topologies, apart from having lesser switch count, exhibit the merits in terms of reduced voltage stresses across the switches. In addition, a detailed comparative study of both topologies has been presented in this paper to demonstrate the features of the proposed topologies. Several experimental results have been included in this paper to validate the performances of the proposed topologies with different loading condition and dynamic changes in load and modulation indexes.

KEYWORDS:

1.      Asymmetric, hybrid inverter

2.      Inverter topology

3.      Multilevel inverter

4.      MLI

5.      Nearest level control

6.      Power electronics

7.      Single-phase inverter

8.      Reduce switch count

SOFTWARE: MATLAB/SIMULINK

CONCLUSION:

This paper presents a new assembly of multilevel inverter topology with consideration of reduced switch count. The proposed topology has been discussed in details with the basic unit with 3S-15L configuration generating 15 levels, and the extension of the proposed topology with 4S-25L configuration to achieves 25 levels. Two generalized structure of the proposed topology has also been proposed. A detailed comparative study has been carried out with the proposed topology and recently reported topologies with three and four dc voltage sources. Finally, several experimental results proves the suitability and workability of the proposed topology with different type of loading combinations considering the change of modulation indexes.

REFERENCES:

[1] H. Akagi, ``Multilevel converters: Fundamental circuits and systems,'' Proc. IEEE, vol. 105, no. 11, pp. 2048_2065, Nov. 2017.

[2] J. I. Leon, S. Vazquez, and L. G. Franquelo, ``Multilevel converters: Control and modulation techniques for their operation and industrial applications,'' Proc. IEEE, vol. 105, no. 11, pp. 2066_2081, Nov. 2017.

[3] J. Rodríguez, J.-S. Lai, and F. Z. Peng, ``Multilevel inverters: A survey of topologies, controls, and applications,'' IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724_738, Aug. 2002.

[4] S. Kouro et al., ``Recent advances and industrial applications of multilevel converters,'' IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553_2580, Aug. 2010.

[5] N. Prabaharan and K. Palanisamy, ``A comprehensive review on reduced switch multilevel inverter topologies, modulation techniques and applications,'' Renew. Sustain. Energy Rev., vol. 76, pp. 1248_1282, Sep. 2017.